Product specifications
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Table 26 GPIO SNMP Management
The GPIO pins can also be managed via SNMP. The available MIB items are described in this section.
The GPIO related MIB items are in the Silex private MIB, and the GPIO tree is at
gpio=enterprises.1240.2.3.4.9.
GPIO bit mask
Integer read-only gpio.1
This is an integer representing a bit mask indicating what GPIO pins are available. There is a 1 for
each GPIO pin that is present. For the SX-560, this value is 255 (xFF), indicating 8 GPIO pins.
GPIO direction control
Integer read-only gpio.2
This is an integer representing a bit mask indicating which GPIO bits are configured for outputs. Only
bits for which the GPIO bit mask is 1 are valid. A 1 indicates the GPIO bit is an output, a 0 indicates an
input.
7 6 5 4 3 2 1 0
GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1
GPIO data
Integer read-write gpio.2
This is an integer representing a bit mask indicating the GPIO bits status. On a read, the current value
of the input pins is returned. Output bits return the last value set. On a write, bits configured as outputs
are set to the value given by the corresponding mask bit. For input bits, a write has no effect.
7 6 5 4 3 2 1 0
GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1
GPIO trigger mask
Integer read-only gpio.2
This value is an integer representing a 32 bit mask expressed in hex digits. The mask is encoded as
follows:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
N/A N/A N/A N/A N/A N/A N/A N/A TRIG16 TRIG15 TRIG14 TRIG13 TRIG12 TRIG11 TRIG10 TRIG9
GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1
1 to 0 1 to 0 1 to 0 1 to 0 1 to 0 1 to 0 1 to 0 1 to 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
N/A N/A N/A N/A N/A N/A N/A N/A TRIG8 TRIG7 TRIG6 TRIG5 TRIG4 TRIG3 TRIG2 TRIG1
GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1
0 to 1 0 to 1 0 to 1 0 to 1 0 to 1 0 to 1 0 to 1 0 to 1
A value of 1 indicates the corresponding GPIO trigger condition is enabled. A value of 0 indicates the
correspon ding GPIO trigger condition is disabled. For example a hex value of 4 represents GPIO3 0 to
1 transition (TRIG3) is enabled as a trigger.