User`s manual

30
Signal Name Definition
CS3 Chip select for the 64 Mbytes of SDRAM
RAS3L/PTJ0 RAS for lower 32 Mbytes SDRAM
RAS3U/PTE2 RAS for upper 32 Mbytes SDRAM
CASLL/CAS/PTJ2 CAS for lower 32 Mbytes SDRAM
CASLH/CAS/PTJ3 CAS for upper 32 Mbytes SDRAM
CKE/PTK5 CKE for all SDRAM
R/W Read/write for all SDRAM
WE[0:3] Upper and lower DQMs for SDRAM
CKIO Clock for all SDRAM
Note: The 100 MHz SDRAM parts will be used.
Ethernet Interface
The Ethernet interface is a standard 10Base-T implementation on an RJ45 connector.
RJ45 Pin Signal I/O
1 Tx+ Out
2 Tx- Out
3 Rx+ In
4 — —
5 — —
6 Rx- In
7 — —
8 — —
H-UDI Port Definition
The H-UDI port provides support for the Hitachi E10A emulator. The E10A is a software and
hardware development support tool for applications using the SH7709A/7729.
I/O Port Definition
TCK/PTF4/PINT12 H-UDI_TCK
TDI/PTF5/PINT13 H-UDI_TDI
TMS/PTF6/PINT14 H-UDI_TMS
TRST/PTF7/PINT15 H-UDI_TRST
TDO/PTE0 H-UDI_TDO
ASEBRKACK ASEBRKACK
ASEMDO ASEMDO (needs to be 0 to enable JTAG)