Operator`s manual

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prove frequency counter speed while measuring 100Hz to 500Hz, set it to COUNTER_20HZ. The
result is a measurement time of 16ms at 500Hz and 31ms at 100Hz. Doing this increases the peak to peak
measurement error to 0.2% and 0.07% respectively.
To return to the frequency counter to its normal, auto ranging mode, issue DMMUnlockCounter
ccommand, or select VAC. Counter ranges are defined in USBDMMUser.h file.
Range Symbol Range
Value
Frequency Range Period Range
COUNTR_20HZ 0 1.9 Hz to 19.9 Hz 50.3 ms to 526 ms
COUNTR_130HZ 1 19.9 Hz to 128.8 Hz 7.76 ms to 50.3 ms
COUNTR_640HZ 2 128.8 Hz to 640 Hz 1.563 ms to 7.76 ms
COUNTR_2500HZ 3 640 Hz to 2.56 kHz 390.6 µs to 1.563 ms
COUNTR_10kHZ 4 2.56 kHz to 10.24 kHz 97.66 µs to 390.6 µs
COUNTR_40kHZ 5 10.24 kHz to 40.96 kHz 24.41 µs to 97.66 µs
COUNTR_200kHZ 6 40.96 kHz to 200 kHz 5 µs to 24.41 µs
COUNTR_500kHZ 7 200 kHz to 500 kHz 2 µs to 5 µs
Figure 4.17. Frequency counter range definition.
The selected frequency range is the indicator of the maximum frequency that range can measure. When
selecting/locking a range, the frequency the range can indicate is between the lowest indicated for that
range, but above the upper limit of the range. For instance, while in the 20Hz range, the lowest frequency
that can be measured 1.9 Hz, while at the high end frequencies as high as 10 kHz can be measured,
provided the diminished resolution at that frequency is acceptable.
Both Frequency and Period measurement performance can be improved by properly setting the SMU2064
Threshold DAC. See “Threshold DAC”, “AC Median Value”, and “Peak-to-Peak” measurements for
further details.
4.15.3 Duty Cycle Measurement (SMU2064)
Duty Cycle of signals from 2 Hz to 100 kHz can be measured. The minimum positive or negative pulse
width of the signal must be at least 19s. When measuring duty cycle precisely, the voltage at which the
measurement is made is important, due to finite slew rates of the signal. With the SMU2064, the
Threshold voltage can be set for precise control of the level at which duty cycle is measured. For best
measurement results, set the Threshold DAC to the Median value. This is particularly important for
signals with low duty-cycle and small amplitude relative to the selected scale.
4.15.4 Pulse Width (SMU2064)
User selectable positive or negative pulse widths may be measured for signal frequencies of 2 Hz to 25
kHz and minimum pulse widths of 19 s. The Threshold DAC feature allows measurements at a pre-
defined signal level. See Threshold DAC above for more details.
To measure pulse width, the DMM must be in the AC volts range appropriate for the input voltage.
Keeping the peak-to-peak amplitude of the measured signal below 5.75 times the set range will guarantee
the signal is within the linear region of the AC circuitry and gives the best performance.
4.15.5 Totalizer Event Counter (SMU2064)
The Totalizer can be selected while the DMM is in the ACV mode. It is capable of counting events such
as over-voltage excursions, switch closures, decaying resonance count, etc. The active edge polarity can
be set for a positive or negative transition. A count of up to 10
9
may be accumulated. The maximum rate
of accumulation is 30,000 events per second. Use DMMStartTotalized to start it, DMMReadTotalizer
to read the accumulated count, and DMMStorTotalizer to terminate the accumulation.
The Threshold DAC can be set for a negative or positive voltage value. See Threshold DAC above for
more details.
53 Signametrics
Example One: To monitor and capture the AC line for positive spikes which exceed 10% of the nominal
120 V RMS value, first select ACV 250 V range, than set the Threshold DAC to 186.7 V. This value is
the peak value of 120 V RMS plus 10% (120V + 10%) X
2
). Enable the Totalizer and read it
periodically to get the number of times this value was exceeded.