User Manual

Programming/AUX
This is a ten pin connector with 2mm center-to-center spacing. It is arranged in a 5x2
pattern. The pinout is as follows:
1. P2.1/Debug 1 – Programming interface and External Watchdog Reset.
Toggled every time SW goes through the main loop for external watchdog
reset. Needs to be cycled at least every ½ second.
2. P0.7 – LNA power on SFTS-300. Analog input 7, Digital I/O. Unbuffered
I/O line to/from CC1110 on the SFTS-10.
3. P2.2/Debug 2 – Programming interface – may be used as digital I/O if
necessary. If pulled high during the entire startup sequence (blinking LEDs),
the configuration will be reset. Should be pulled down on motherboard if not
used.
4. P0.6 – Analog input 6, Digital I/O. Unbuffered I/O line from CC1110
5. RESET/n – CC1110 Reset Line – Should be pulled high on motherboard.
6. P2.0 – Power Amp Control – HW line from PA and switch control. Low
when PA is on and High when PA is off. Not connected on 10mA boards.
7. P0.4 – SPI MOSI
8. P0.5 – SPI MISO
9. P0.3 – SPI CLK
10. P1.0 – Red LED
EEPROM
The radio boards support a single serial (SPI) EEPROM. The following EEPROMs are
supported:
Manufacturer Part Number Description
Atmel AT25640AN-10SU-2.7 64 Kbit (8 Kbyte)
Microchip 25LC1024I/SM 1 Mbit (128 Kbyte)
The footprint is a standard 8 pin SOIC with the following pinout:
1. CS/n
2. SO
3. WP/n (tied high)
4. GND
5. SI
6. SCK
7. HOLD/n (tied high)
8. VCC (2.7-5.5V)