Specifications

XT65/XT75 Hardware Interface Description
3.15 Analog-to-Digital Converter (ADC)
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XT65_XT75_HD_v01.001 Page 68 of 133 2007-1-8
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3.15 Analog-to-Digital Converter (ADC)
The ADC of the XT65/XT75 consists of 2 independent, unbalanced, multiplexed analog inputs that can be used
for measuring external DC voltages in the range of 0mV…+2400mV. The ADC has a resolution of 12 bits.
Use the command AT^SRADC described in [1] to select the analog inputs ADC1_IN or ADC2_IN, to set the mea-
surement mode and read out the measurement results. The measured values are indicated in mV.
There is no out of range detection. Voltages beyond these limits cannot be measured:
Underflow: Values = -25mV
Overflow: Values > 2425mV
The sample period is adjustable from 30s up to 100ms by AT^SRADC
Only during sample time (ts~400µs) the S&H Switch is closed.
Figure 33: Analog-to-Digital Converter (ADC)
Restrictions during SLEEP Mode
During SLEEP mode the ADC is shut down temporarily (by default). Please make sure that during SLEEP mode
shutdown the ADCx_IN input voltage does not exceed ±0.3V. The input current (reverse feeding) may reach
3mA! If SLEEP mode is activated there are three protection possibilities:
• Use the RC combination as shown in Figure 30 for current limitation.
Advantages: Lowest current consumption at SLEEP mode, small component count, high input resistance
Disadvantages: Lower input resistance at SLEEP mode (100k only).
• Use the AT^SNFM=,1 command to enable the ADC supply continuously.
Advantages: No additional component components needed.
Disadvantages: Higher current consumption in SLEEP mode (about 2mA).
• Detect presence of VMIC-voltage. If VMIC is off, make sure that ADCx_IN input voltage does not exceed
±0.3V
Advantages: Lowest current, high input resistance.
Disadvantages: Effort for SLEEP mode (VMIC) detection.