XT65/XT75 Siemens Cellular Engine Version: DocId: Supported Products: 01.001 XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description s Document Name: XT65/XT75 Hardware Interface Description Version: 01.001 Date: 2007-1-8 DocId: XT65_XT75_HD_v01.001 Status Confidential / Released Supported Products: XT65, XT75 General Notes Product is deemed accepted by recipient and is provided without interface to recipient’s products. The documentation and/or product are provided for testing, evaluation, integration and information purposes.
XT65/XT75 Hardware Interface Description Contents s Contents 0 Document History.................................................................................................................................... 9 1 Introduction............................................................................................................................................ 11 1.1 Related Documents..................................................................................................................
XT65/XT75 Hardware Interface Description Contents 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 4 s 3.5.6 Implemented Charging Technique................................................................................. 44 3.5.7 Operating Modes during Charging................................................................................. 45 Power Saving ................................................................................................................................ 47 3.6.
Contents s 4.2 4.3 4.4 GPS-GSM Interface ...................................................................................................................... 77 Software Control............................................................................................................................ 78 Power Saving ................................................................................................................................
XT65/XT75 Hardware Interface Description List of Tables s Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Table 14: Table 15: Table 16: Table 17: Table 18: Table 19: Table 20: Table 21: Table 22: Table 23: Table 24: Table 25: Table 26: Table 27: Table 28: Table 29: Table 30: Table 31: Table 32: Table 33: Table 34: Table 35: Table 36: Table 37: Table 38: Table 39: Table 40: Table 41: Table 42: Table 43: Directives ............
XT65/XT75 Hardware Interface Description List of Figures s Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26: Figure 27: Figure 28: Figure 29: Figure 30: Figure 31: Figure 32: Figure 33: Figure 34: Figure 35: Figure 36: Figure 37: Figure 38: Figure 39: Figure 40: Figure 41: F
XT65/XT75 Hardware Interface Description List of Figures Figure 47: Figure 48: Figure 49: Figure 50: Figure 51: Figure 52: Figure 53: Figure 54: Figure 55: Figure 56: Figure 57: s GPS antenna pad placement...................................................................................................... 86 Pin assignment (component side of XT65/XT75) ....................................................................... 93 Audio programming model.......................................................
XT65/XT75 Hardware Interface Description 0 Document History 0 s Document History Preceding document: "XT65/XT75 Hardware Interface Description" Version 00.144 New document: "XT65/XT75 Hardware Interface Description" Version 01.001 Chapter What is new 3.15 New section Analog-to-Digital Converter (ADC). Removed corresponding table footnote from Table 29. 3.3.3.2 Updated remark on how to minimize leakage current. 3.8 Modified the RTC backup section to include the GPS receiver’s separate RTC. 6.
XT65/XT75 Hardware Interface Description 0 Document History 5 Added remark on given DC electric strength for GSM antenna interface. 7.1 Added remark on SELV compliance. s Table 22: Modified values for GSM/GPS antenna. 7.2 Modified tables showing operating temperatures (Table 23, Table 24). 7.8.2 Modified position of and Figure 49. 7.10 Changed test procedure (RF choke) and Table 39. 8.2 Added note on attachment of cooling elements. 11.
XT65/XT75 Hardware Interface Description 1 Introduction 1 s Introduction This document applies to the following Siemens products: • • XT65 Module XT75 Module The document describes the hardware of the XT65 and XT75 modules, both designed to connect to a cellular device application and the air interface. It helps you quickly retrieve interface specifications, electrical and mechanical details and information on the requirements to be considered for integrating further components.
XT65/XT75 Hardware Interface Description 1.2 Terms and Abbreviations 1.2 s Terms and Abbreviations Abbreviation Description ADC Analog-to-Digital Converter AGC Automatic Gain Control ANSI American National Standards Institute ARFCN Absolute Radio Frequency Channel Number ARP Antenna Reference Point ASC0 Asynchronous Controller.
XT65/XT75 Hardware Interface Description 1.2 Terms and Abbreviations Abbreviation Description ESD Electrostatic Discharge ETS European Telecommunication Standard FCC Federal Communications Commission (U.S.
XT65/XT75 Hardware Interface Description 1.
XT65/XT75 Hardware Interface Description 1.3 Regulatory and Type Approval Information 1.3 s Regulatory and Type Approval Information 1.3.1 Directives and Standards XT65/XT75 is designed to comply with the directives and standards listed below. Please note that the product is still in a pre-release state and, therefore, type approval and testing procedures have not yet been completed.
XT65/XT75 Hardware Interface Description 1.3 Regulatory and Type Approval Information s Table 3: Standards of European type approval GCF-CC V3.21.0 Global Certification Forum - Certification Criteria ETSI EN 301 489-1 V1.4.1 Candidate Harmonized European Standard (Telecommunications series) Electro Magnetic Compatibility and Radio spectrum Matters (ERM); Electro Magnetic Compatibility (EMC) standard for radio equipment and services; Part 1: Common Technical Requirements ETSI EN 301 489-7 V1.2.
XT65/XT75 Hardware Interface Description 1.3 Regulatory and Type Approval Information 1.3.3 s SELV Requirements The power supply connected to the XT65/XT75 module shall be in compliance with the SELV requirements defined in EN 60950-1. See also Section 7.1 for further detail. 1.3.4 Safety Precautions The following safety precautions must be observed during all phases of the operation, usage, service or repair of any cellular terminal or mobile incorporating XT65/XT75.
XT65/XT75 Hardware Interface Description 1.3 Regulatory and Type Approval Information s IMPORTANT! Cellular terminals or mobiles operate using radio signals and cellular networks. Because of this, connection cannot be guaranteed at all times under all conditions. Therefore, you should never rely solely upon any wireless device for essential communications, for example emergency calls.
XT65/XT75 Hardware Interface Description 2 Product Concept 2 Product Concept 2.
XT65/XT75 Hardware Interface Description 2.1 Key Features at a Glance Feature Implementation SMS Point-to-point MT and MO s Cell broadcast Text and PDU mode Storage: SIM card plus 25 SMS locations in mobile equipment Transmission of SMS alternatively over CSD or GPRS. Preferred mode can be user defined. Fax Group 3; Class 1 Audio Speech codecs: - Half rate HR (ETS 06.20) - Full rate FR (ETS 06.10) - Enhanced full rate EFR (ETS 06.50/06.60/06.
XT65/XT75 Hardware Interface Description 2.1 Key Features at a Glance s Feature Implementation TCP/IP stack Access by AT commands IP addresses IP version 4 Remote SIM Access XT65/XT75 supports Remote SIM Access. RSA enables XT65/XT75 to use a remote SIM card via its serial interface and an external application, in addition to the SIM card locally attached to the dedicated lines of the application interface.
XT65/XT75 Hardware Interface Description 2.1 Key Features at a Glance Feature s Implementation Special features Charging Supports management of rechargeable Lithium Ion and Lithium Polymer batteries Real time clock Timer functions via AT commands GPIO 10 I/O pins of the application interface programmable as GPIO. Programming is done via AT commands. Alternatively, GPIO10 pin is configurable as pulse counter. Pulse counter Pulse counter for measuring pulse rates from 0 to 1000 pulses per second.
XT65/XT75 Hardware Interface Description 2.2 XT65/XT75 System Overview 2.2 s XT65/XT75 System Overview Figure 1: XT65/XT75 system overview XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 2.3 Circuit Concept 2.
XT65/XT75 Hardware Interface Description 2.3 Circuit Concept s Figure 2: XT65/XT75 block diagram XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 3 GSM Application Interface 3 s GSM Application Interface XT65/XT75 is equipped with an 80-pin board-to-board connector that connects to the external application. The host interface incorporates several sub-interfaces described in the following sections: • • • • • • • • • • • Power supply – see Section 3.1 Charger interface – see Section 3.5 SIM interface – see Section 3.9 Serial interface ASC0 – see Section 3.10 Serial interface USB – see Section 3.
XT65/XT75 Hardware Interface Description 3.1 Operating Modes 3.1 s Operating Modes The table below briefly summarizes the various operating modes referred to in the following chapters. Table 5: Overview of operating modes Normal operation GSM / GPRS SLEEP Various power save modes set with AT+CFUN command. Software is active to minimum extent. If the module was registered to the GSM network in IDLE mode, it is registered and paging with the BTS in SLEEP mode, too.
XT65/XT75 Hardware Interface Description 3.2 Power Supply 3.2 s Power Supply XT65/XT75 needs to be connected to a power supply at the B2B connector (5 pins each BATT+ and GND). The power supply of XT65/XT75 has to be a single voltage source at BATT+. It must be able to provide the peak current during the uplink transmission. All the key functions for supplying power to the device are handled by the power management section of the analog controller.
s XT65/XT75 Hardware Interface Description 3.2 Power Supply 3.2.2 Measuring the Supply Voltage VBATT+ The reference points for measuring the supply voltage VBATT+ on the module are BATT+ and GND, both accessible at a capacitor located close to the board-to-board connector of the module. Reference point BATT+ Reference point GND Figure 4: Position of the reference points BATT+ and GND 3.2.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios 3.3 s Power-Up / Power-Down Scenarios In general, be sure not to turn on XT65/XT75 while it is beyond the safety limits of voltage and temperature stated in Section 7.1. XT65/XT75 would immediately switch off after having started and detected these inappropriate conditions. In extreme cases this can cause permanent damage to the module. 3.3.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios s which shall be altered to AT\Q3 (RTS/CTS handshake). If the application design does not integrate RTS/CTS lines the host application shall wait at least for the "^SYSSTART" or "^SYSSTART AIRPLANE MODE" URC. However, if the URCs are neither used (due to autobauding) then the only way of checking the module’s ready state is polling. To do so, try to send characters (e.g. “at”) until the module is responding. See also Section 3.3.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios s For details on how to use EMERG_RST to reset applications or external devices see Section 3.3.1.6. Figure 6: Power-on with IGT held low before switching on operating voltage at BATT+ If the IGT line is driven low for less than 400ms the module will, instead of starting up, send only the alert message "SHUTDOWN after Illegal PowerUp" to the host application.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios 3.3.1.2 s Configuring the IGT Line for Use as ON/OFF Switch The IGT line can be configured for use in two different switching modes: You can set the IGT line to switch on the module only, or to switch it on and off. The switching mode is determined by the parameter "MEShutdown/ OnIgnition" of the AT^SCFG command.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios 3.3.1.4 s Reset XT65/XT75 via AT+CFUN Command To reset and restart the XT65/XT75 module use the command AT+CFUN. You can enter AT+CFUN=,1 or AT+CFUN=x,1, where x may be in the range from 0 to 9. See [1] for details. If configured to a fix baud rate (AT+IPR ≠ 0), the module will send the URC "^SYSSTART" or "^SYSSTART AIRPLANE MODE" to notify that it is ready to operate.
s XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios 3.3.2 Signal States after Startup Table 6 describes the various states each interface pin passes through after startup and during operation. As shown in Figure 5 and Figure 6 the pins are in undefined state while the module is initializing. Once the startup initialization has completed, i.e. when CTS is high and the software is running, all pins are in defined state.
s XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios Table 6: Signal states Signal name Undefined state during startup Defined state after initialization Active state after configuration by AT command GPIO SPI I2C DAI DAI1 I Tristate I DAI2 I Tristate O, L DAI3 I Tristate O, L DAI4 I Tristate I DAI5 I Tristate I DAI6 I Tristate I Abbreviations used in the table: L = Low output level PD = Pull down with min +15µA and max.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios s While XT65/XT75 is in Power-down mode the application interface is switched off and must not be fed from any other source. Therefore, your application must be designed to avoid any current flow into any digital pins of the application interface, especially of the serial interface. No special care is required for the USB interface which is protected from reverse current.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios 3.3.3.3 s Turn on/off XT65/XT75 Applications with Integrated USB In a Windows environment, the USB COM port emulation causes the USB port of XT65/XT75 to appear as a virtual COM port (VCOM port). The VCOM port emulation is only present when Windows can communicate with the module, and is lost when the module shuts down.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios s The maximum temperature ratings are stated in Section 7.2. Refer to Table 7 for the associated URCs. Table 7: Temperature dependent behavior Sending temperature alert (15s after XT65/XT75 start-up, otherwise only if URC presentation enabled) ^SCTM_A: 1 Caution: Battery close to overtemperature limit. ^SCTM_B: 1 Caution: Bboard close to overtemperature limit. ^SCTM_A: -1 Caution: Battery close to undertemperature limit.
XT65/XT75 Hardware Interface Description 3.3 Power-Up / Power-Down Scenarios 3.3.4.4 s Undervoltage Shutdown if no Battery NTC is Present The undervoltage protection is also effective in applications, where no NTC connects to the BATT_TEMP terminal. Thus, you can take advantage of this feature even though the application handles the charging process or XT65/XT75 is fed by a fixed supply voltage.
XT65/XT75 Hardware Interface Description 3.4 Automatic EGPRS/GPRS Multislot Class Change 3.4 s Automatic EGPRS/GPRS Multislot Class Change Temperature control is also effective for operation in EGPRS Multislot Class 10 (XT75 only), GPRS Multislot Class 10 and GPRS Multislot Class 12. If the board temperature rises close to the limit specified for normal operation (see Section 7.
XT65/XT75 Hardware Interface Description 3.5 Charging Control 3.5.3 s Battery Pack Requirements The charging algorithm has been optimized for rechargeable Lithium batteries that meet the characteristics listed below and in Table 8. It is recommended that the battery pack you want to integrate into your XT65/XT75 application is compliant with these specifications. This ensures reliable operation, proper charging and, particularly, allows you to monitor the battery capacity using the AT^SBC command.
XT65/XT75 Hardware Interface Description 3.5 Charging Control s Table 8: Specifications of battery packs suitable for use with XT65/XT75 Battery type Rechargeable Lithium Ion or Lithium Polymer battery Nominal voltage 3.6V / 3.7V Capacity > 500mAh NTC 10kΩ ± 5% @ 25°C approx. 5kΩ @ 45°C approx. 26.2kΩ @ 0°C B value range: B (25/85)=3423K to B =3435K ± 3% Overcharge detection voltage 4.325 ± 0.025V Overdischarge detection voltage 2.4V Overdischarge release voltage 2.
XT65/XT75 Hardware Interface Description 3.5 Charging Control 3.5.5 s Charger Requirements For using the implemented charging algorithm and the reference charging circuit recommended in [5] and in Figure 54, the charger has to meet the following requirements: Output voltage: 5.2Volts ±0.2V (stabilized voltage) Output current: 500mA Chargers with a higher output current are acceptable, but please consider that only 500mA will be applied when a 0.
XT65/XT75 Hardware Interface Description 3.5 Charging Control 3.5.7 s Operating Modes during Charging Of course, the battery can be charged regardless of the engine's operating mode. When the GSM module is in Normal mode (SLEEP, IDLE, TALK, GPRS IDLE or GPRS DATA mode), it remains operational while charging is in progress (provided that sufficient voltage is applied). The charging process during the Normal mode is referred to as Charge mode.
s XT65/XT75 Hardware Interface Description 3.5 Charging Control Table 10: Comparison Charge-only and Charge mode Charge mode How to activate mode Description of mode Connect charger to charger input of host application charging circuit and module’s VCHARGE pin while XT65/XT75 is • • • • operating, e.g. in IDLE or TALK mode in SLEEP mode Battery can be charged while GSM module remains operational and registered to the GSM network. In IDLE and TALK mode, the serial interface is accessible.
XT65/XT75 Hardware Interface Description 3.6 Power Saving 3.6 s Power Saving Intended for power saving, SLEEP mode reduces the functionality of the XT65/XT75 to a minimum and thus minimizes the current consumption. Settings can be made using the AT+CFUN command. For details see [1]. SLEEP mode falls in two categories: • • NON-CYCLIC SLEEP mode: AT+CFUN = 0 CYCLIC SLEEP modes, AT+CFUN = 7 or 9. The functionality level AT+CFUN=1 is where power saving is switched off. This is the default after startup.
XT65/XT75 Hardware Interface Description 3.6 Power Saving 3.6.1 s Network Dependency of SLEEP Modes The power saving possibilities of SLEEP modes depend on the network the module is registered in. The paging timing cycle varies with the base station. The duration of a paging interval can be calculated from the following formula: t = 4.615 ms (TDMA frame duration) * 51 (number of frames) * DRX value. DRX (Discontinuous Reception) is a value from 2 to 9, resulting in paging intervals from 0.47-2.
XT65/XT75 Hardware Interface Description 3.6 Power Saving 3.6.3 s Timing of the RTS0 Signal in CYCLIC SLEEP Mode 9 In SLEEP mode 9 the falling edge of RTS0 can be used to temporarily wake up the ME. In this case the activity time is at least the time set with AT^SCFG="PowerSaver/Mode9/ Timeout", (default 2 seconds). RTS0 has to be asserted for at least a dedicated debounce time in order to wake up the ME.
s XT65/XT75 Hardware Interface Description 3.7 Summary of State Transitions (Except SLEEP Mode) 3.7 Summary of State Transitions (Except SLEEP Mode) The following table shows how to proceed from one mode to another (grey column = present mode, white columns = intended modes).
XT65/XT75 Hardware Interface Description 3.8 RTC Backup 3.8 s RTC Backup The Real Time Clock (RTC) of the module’s GSM unit is supplied from a separate voltage regulator in the analog controller. The RTC of the GPS receiver is supplied from an external voltage regulator. Both RTCs are also active, if XT65/XT75 is in POWER-DOWN mode. An alarm function is provided that allows to wake up the module’s GSM part to Airplane mode without logging on to the GSM network.
XT65/XT75 Hardware Interface Description 3.9 SIM Interface 3.9 s SIM Interface The baseband processor has an integrated SIM interface compatible with the ISO 7816 IC Card standard. This is wired to the host interface (board-to-board connector) in order to be connected to an external SIM card holder. Six pins on the board-to-board connector are reserved for the SIM interface. The SIM interface supports 3V and 1.8V SIM cards.
XT65/XT75 Hardware Interface Description 3.10 Serial Interface ASC0 3.10 s Serial Interface ASC0 XT65/XT75 offers an 8-wire unbalanced, asynchronous modem interface ASC0 conforming to ITU-T V.24 protocol DCE signalling. The electrical characteristics do not comply with ITU-T V.28. The significant levels are 0V (for low data bit or active state) and 2.9V (for high data bit or inactive state). For electrical characteristics please refer to Table 29. XT65/XT75 is designed for use as a DCE.
s XT65/XT75 Hardware Interface Description 3.10 Serial Interface ASC0 Table 13: DCE-DTE wiring of ASC0 V.24 circuit DCE DTE Pin function Signal direction Pin function Signal direction 103 TXD0 Input TXD Output 104 RXD0 Output RXD Input 105 RTS0 Input RTS Output 106 CTS0 Output CTS Input 108/2 DTR0 Input DTR Output 107 DSR0 Output DSR Input 109 DCD0 Output DCD Input 125 RING0 Output RING Input XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 3.11 USB Interface 3.11 s USB Interface XT65/XT75 supports a USB 2.0 Full Speed (12Mbit/s) device interface. It can be operated on a USB 2.0 Full Speed or High Speed root hub (a PC host), but not on a generic USB 2.0 High Speed hub which translates High Speed (480 Mbit/s/) to Full Speed (12 Mbit/s). The USB port has different functions depending on whether or not Java is running.
XT65/XT75 Hardware Interface Description 3.12 I2C Interface 3.12 s I2C Interface I2C is a serial, 8-bit oriented data transfer bus for bit rates up to 400kbps in Fast mode. It consists of two lines, the serial data line I2CDAT and the serial clock line I2CCLK. The XT65/XT75 module acts as a single master device, e.g. the clock I2CCLK is driven by module. I2CDAT is a bi-directional line.
XT65/XT75 Hardware Interface Description 3.13 SPI Interface 3.13 s SPI Interface The SPI (serial peripheral interface) is a synchronous serial interface for control and data transfer between the XT65/XT75 module and the connected application. Only one application can be connected to the module’s SPI. The interface supports transmission rates up to 6.5Mbit/s. It consists of four lines, the two data lines SPIDI/ SPIDO, the clock line SPICLK and the chip select line SPICS.
XT65/XT75 Hardware Interface Description 3.13 SPI Interface s Figure 21: Characteristics of SPI modes XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces 3.14 s Audio Interfaces XT65/XT75 comprises three audio interfaces available on the board-to-board connector: • • Two analog audio interfaces, both with balanced or single-ended inputs/outputs. Serial digital audio interface (DAI) designed for PCM (Pulse Code Modulation). This means you can connect up to three different audio devices, although only one interface can be operated at a time.
s XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces 3.14.1 Speech Processing The speech samples from the ADC or DAI are handled by the DSP of the baseband controller to calculate e.g. amplifications, sidetone, echo cancellation or noise suppression depending on the configuration of the active audio mode. These processed samples are passed to the speech encoder.
s XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces RA has to be chosen so that the DC voltage across the microphone falls into the bias voltage range of 1.0V to 1.6V and the microphone feeding current meets its specification. The MICNx input is automatically self biased to the MICPx DC level. It is AC coupled via CK to a resistive divider which is used to optimize supply noise cancellation by the differential microphone amplifier in the module.
s XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces 3.14.2.3 Line Input Configuration with OpAmp Figure 25 shows an example of how to connect an opamp into the microphone circuit. RA = typ. 47k RVMIC = 470Ohm Ck = typ. 100nF CF = typ. 22µF VMIC = typ. 2.5V Vbias = typ. ½ VMIC = 1.25V Figure 25: Line input configuration with OpAmp The AC source (e.g. an opamp) and its reference potential have to be AC coupled to the MICPx resp. MICNx input terminals.
s XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces 3.14.3 Loudspeaker Circuit The GSM module comprises two analog speaker outputs: EP1 and EP2. Output EP1 is able to drive a load of 8Ohms while the output EP2 can drive a load of 32Ohms. Each interface can be connected in differential and in single ended configuration. Figure 26 shows an example of a differential loudspeaker configuration. Loudspeaker impedance EPP1/EPN1 ZL = typ. 8Ohm EPP2/EPN2 ZL = typ.
s XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces In all configurations the PCM interface has the following common features: • • • • • 16 Bit linear 8kHz sample rate the most significant bit MSB is transferred first 125µs frame duration common frame sync signal for transmit and receive Table 15 shows the assignment of the DAI0...6 pins to the PCM interface signals.
XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces s The timing of a PCM short frame is shown in Figure 28. The 16-bit TXDAI and RXDAI data is transferred simultaneously in both directions during the first 16 clock cycles after the frame sync pulse. The duration of a frame sync pulse is one BITCLK period, starting at the rising edge of BITCLK. TXDAI data is shifted out at the next rising edge of BITCLK. RXDAI data (i.e.
XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces 3.14.4.2 s Slave Mode In slave mode the PCM interface is controlled by an external bit clock and an external frame sync signal applied to the BCLKIN and FSIN pins and delivered either by the connected codec or another source. The bit clock frequency has to be in the range of 256kHz -125ppm to 512kHz +125ppm.
XT65/XT75 Hardware Interface Description 3.14 Audio Interfaces s The following figures show the slave short and long frame timings. Because these are edge controlled, frame sync signals may deviate from the ideally form as shown with the dotted lines. Figure 31: Slave PCM Timing, Short Frame selected Figure 32: Slave PCM Timing, Long Frame selected XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 3.15 Analog-to-Digital Converter (ADC) 3.15 s Analog-to-Digital Converter (ADC) The ADC of the XT65/XT75 consists of 2 independent, unbalanced, multiplexed analog inputs that can be used for measuring external DC voltages in the range of 0mV…+2400mV. The ADC has a resolution of 12 bits. Use the command AT^SRADC described in [1] to select the analog inputs ADC1_IN or ADC2_IN, to set the measurement mode and read out the measurement results.
XT65/XT75 Hardware Interface Description 3.16 GPIO Interface 3.16 s GPIO Interface The XT65/XT75 has 10 GPIOs for external hardware devices. Each GPIO can be configured for use as input or output. All settings are AT command controlled. The GPIO related AT commands are the following: AT^SPIO, AT^SCPIN, AT^SCPOL, AT^SCPORT, AT^SDPORT, AT^SGIO, AT^SSIO. A detailed description can be found in [1]. 3.16.
XT65/XT75 Hardware Interface Description 3.17 Control Signals 3.17 3.17.1 s Control Signals Synchronization Signal The synchronization signal serves to indicate growing power consumption during the transmit burst. The signal is generated by the SYNC pin. Please note that this pin can adopt three different operating modes which you can select by using the AT^SSYNC command: the mode AT^SSYNC=0 described below, and the two LED modes AT^SSYNC=1 or AT^SSYNC=2 described in [1] and Section 3.17.2.
XT65/XT75 Hardware Interface Description 3.17 Control Signals 3.17.2 s Using the SYNC Pin to Control a Status LED As an alternative to generating the synchronization signal, the SYNC pin can be configured to drive a status LED that indicates different operating modes of the XT65/XT75 module. To take advantage of this function the LED mode must be activated with the AT^SSYNC command and the LED must be connected to the host application.
s XT65/XT75 Hardware Interface Description 3.17 Control Signals 3.17.3 Behavior of the RING0 Line (ASC0 Interface only) The RING0 line is available on the serial interface ASC0 (see also Section 3.10). The signal serves to indicate incoming calls and other types of URCs (Unsolicited Result Code). Although not mandatory for use in a host application, it is strongly suggested that you connect the RING0 line to an interrupt line of your application.
XT65/XT75 Hardware Interface Description 4 GPS Application Interface 4 s GPS Application Interface The XT65/XT75 module integrates a GPS receiver which offers the full performance of GPS technology. The GPS receiver continuously tracks all satellites in view, thus providing accurate satellite position data. The GPS block can be used even if the XT65/XT75 module is deregistered from the GSM network. 4.
XT65/XT75 Hardware Interface Description 4.1 Operating Principles 4.1.2 s GPS Start-Up Depending on the receiver’s knowledge of last position, current time and ephemeris data, the receiver will apply different strategies to start-up, namely: Figure 38: GSP startup behavior The startup time (i.e., TTFF = Time-To-First-Fix) may vary and depends on the start-up-mode: • • • Cold start: 34 seconds Warm start: 33 seconds Hot start: less than 3.5 seconds XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 4.1 Operating Principles 4.1.2.1 s Cold Start Cold Start without Aiding With a cold start, the GPS receiver has no knowledge of its last position or time. This may be the case if: • • the RTC of the GPS receiver has not been running and the battery backup memory is lost (i.e., VDDLP and BATT+ have been off), no valid ephemeris data or almanac data is available, i.
XT65/XT75 Hardware Interface Description 4.1 Operating Principles 4.1.3 s Supported Protocols The GPS receiver supports three implemented protocols – NMEA, RTCM and UBX. It is able to recognize input messages from any of these protocols (e.g., GGA, RMC GSA, GSV) and respond to them accordingly. Input messages can be arbitrarily mixed. Initially the NMEA protocol is enabled for outputs. 4.1.3.1 NMEA Protocol The NMEA protocol is an industry standard protocol developed for marine electronics.
XT65/XT75 Hardware Interface Description 4.1 Operating Principles 4.1.4 s Position Accuracy Improvement Possibilities The accuracy of position fixes is influenced by a number of issues such as sky view, reasonable satellite geometry and so on. The standard position accuracy is 2.5 m CEP and 5.0 m SEP. As explained below, the GPS receiver provides two possibilities to improve the accuracy of position fixes. With DGPS/SBAS the accuracy improves to 2.0 m CEP and 3.0 m SEP. 4.1.4.
XT65/XT75 Hardware Interface Description 4.2 GPS-GSM Interface 4.2 s GPS-GSM Interface The GPS receiver is an integral part of the module and as such controlled over an internal GPS-GSM interface. It communicates over the interface at a fixed bit rate of 57600bps and with the character framing set to 8N1 (8 data bits, no parity, 1 stop bit). These settings should not be altered, even though this option is usually available by means of the NMEA/UBX application (UBX-CFG-PRT) accessing the GPS receiver.
s XT65/XT75 Hardware Interface Description 5 GSM Antenna Interface 5 GSM Antenna Interface The GSM interface has an impedance of 50Ω. XT65/XT75 is capable of sustaining a total mismatch at the antenna connector without any damage, even when transmitting at maximum RF power. DC electric strength is given (see Table 22). The external antenna must be matched properly to achieve best performance regarding radiated power, DCpower consumption, modulation accuracy and harmonic suppression.
s XT65/XT75 Hardware Interface Description 5.2 Antenna Pad Antenna connected to Hirose connector: Antenna connected to pad: Figure 40: Never use antenna connector and antenna pad at the same time 5.2 Antenna Pad The antenna can be soldered to the pad, or attached via contact springs. For proper grounding connect the antenna to the ground plane on the bottom of XT65/XT75 which must be connected to the ground plane of the application.
XT65/XT75 Hardware Interface Description 5.2 Antenna Pad s Also, consider that according to the GSM recommendations TS 45.005 and TS 51.010-01 a 50Ω connector is mandatory for type approval measurements. This requires GSM devices with an integral antenna to be temporarily equipped with a suitable connector or a low loss RF cable with adapter.
s XT65/XT75 Hardware Interface Description 5.3 Antenna Connector 5.3 Antenna Connector For GSM and GPS, XT65/XT75 uses an ultra-miniature SMT antenna connector supplied from Hirose Ltd. The product name is: • U.FL-R-SMT The position of the antenna connector on the XT65/XT75 board can be seen in Section 5.1. Figure 42: Mechanical dimensions of U.FL-R-SMT connector Table 17: Product specifications of U.
s XT65/XT75 Hardware Interface Description 5.3 Antenna Connector Table 17: Product specifications of U.FL-R-SMT connector Item Specification Conditions Temperature cycle No damage, cracks and looseness of parts. Contact resistance: Center 25mΩ Outside 15mΩ Temperature: +40°C → 5 to 35°C → +90°C → 5 to 35°C Time: 30min → within 5min → 30min within 5min Salt spray test No excessive corrosion 48 hours continuous exposure to 5% salt water Table 18: Material and finish of U.
XT65/XT75 Hardware Interface Description 5.3 Antenna Connector s In addition to the connectors illustrated above, the U.FL-LP-(V)-040(01) version is offered as an extremely space saving solution. This plug is intended for use with extra fine cable (up to Ø 0.81mm) and minimizes the mating height to 2mm. See Figure 46 which shows the Hirose datasheet. Figure 45: Specifications of U.FL-LP-(V)-040(01) plug XT65_XT75_HD_v01.
s XT65/XT75 Hardware Interface Description 5.3 Antenna Connector Table 19: Ordering information for Hirose U.FL Series Item Part number HRS number Connector on XT65/XT75 U.FL-R-SMT CL331-0471-0-10 Right-angle plug shell for Ø 0.81mm cable U.FL-LP-040 CL331-0451-2 Right-angle plug for Ø 0.81mm cable U.FL-LP(V)-040 (01) CL331-053-8-01 Right-angle plug for Ø 1.13mm cable U.FL-LP-068 CL331-0452-5 Right-angle plug for Ø 1.32mm cable U.FL-LP-066 CL331-0452-5 Extraction jig E.
XT65/XT75 Hardware Interface Description 6 GPS Antenna Interface 6 s GPS Antenna Interface In order to receive satellite signals an additional GPS antenna must be connected to the GPS part of the XT65/ XT75 module. 6.1 Antenna Installation To suit the physical design of individual applications XT65/XT75 offers two alternative approaches to connecting the antenna: • Recommended approach: U.FL-R-SMT antenna connector from Hirose assembled on the component side of the PCB.
XT65/XT75 Hardware Interface Description 6.2 GPS Antenna 6.2 s GPS Antenna It is possible to connect active or passive GPS antennas. In either case they must have 50 Ohm impedance. The simultaneous operation of GSM and GPS has been implemented. A slight degradation of sensitivity may occur for the GPS receiver, if the GSM transmitter operates during GPS reception.
XT65/XT75 Hardware Interface Description 6.2 GPS Antenna s The use of an active antenna is always advisable, if the RF-cable length between receiver and antenna exceeds about 10 cm. Table 21: GPS antenna: Active versus Passive Active Antenna Passive Antenna Active antenna connected to the GPS module. Passive patch antennas or quadrifilar dipole antennas connected with a microcoax to the GPS module.
s XT65/XT75 Hardware Interface Description 7 Electrical, Reliability and Radio Characteristics 7 Electrical, Reliability and Radio Characteristics 7.1 Absolute Maximum Ratings The absolute maximum ratings stated in Table 22 are stress ratings under any conditions. Stresses beyond any of these limits will cause permanent damage to XT65/XT75. The power supply connected to the XT65/XT75 module shall be compliant with the SELV requirements defined in EN60950.
s XT65/XT75 Hardware Interface Description 7.2 Operating Temperatures 7.2 Operating Temperatures The values listed in Table 23 to Table 25 are applicable at maximum power control level. Table 23: Board temperature Parameter Min Typ Max Unit Temperature measured on XT65/XT75 board -30 --- >+80 °C Temperature measured at battery NTC -20 --- +60 Automatic shutdown1 1. Due to temperature measurement uncertainty, a tolerance on the stated shutdown thresholds may occur.
s XT65/XT75 Hardware Interface Description 7.3 Storage Conditions 7.3 Storage Conditions The conditions stated below are only valid for modules in their original packed state in weather protected, nontemperature-controlled storage locations. Normal storage time under these conditions is 12 months maximum. Table 27: Storage conditions Type Condition Unit Reference Air temperature: Low -40 °C ETS 300 019-2-1: T1.
s XT65/XT75 Hardware Interface Description 7.4 Reliability Characteristics 7.4 Reliability Characteristics The test conditions stated below are an extract of the complete test specifications. Table 28: Summary of reliability test conditions Type of test Conditions Standard Vibration Frequency range: 10-20Hz; acceleration: 3.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description 7.5 Pin Assignment and Signal Description The Molex board-to-board connector on XT65/XT75 is an 80-pin double-row receptacle. The position of the board-to-board connector can be seen in Figure 50 that shows the top view of XT65/XT75.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description Please note that the reference voltages listed in Table 29 are the values measured directly on the XT65/XT75 module. They do not apply to the accessories connected. Table 29: Signal description Function Signal name IO Signal form and level Comment Power supply BATT+ I VI = 3.3V to 4.5V Five pins of BATT+ and GND must be connected in parallel for supply purposes because higher peak currents may occur. VItyp = 3.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description Table 29: Signal description Function Signal name IO Signal form and level Comment Power indicator PWR_IND O VIHmax = 10V PWR_IND (Power Indicator) notifies the module’s on/off state. VOLmax = 0.4V at Imax = 2mA PWR_IND is an open collector that needs to be connected to an external pull-up resistor. Low state of the open collector indicates that the module is on.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description Table 29: Signal description Function Signal name IO Signal form and level Comment Synchronization SYNC O VOLmax = 0.3V at I = 0.1mA There are two alternative options for using the SYNC pin: VOHmin = 2.3V at I = -0.1mA VOHmax = 3.05V n Tx = n x 577µs impulse each 4.616ms, with 180µs forward time. a) Indicating increased current consumption during uplink transmission burst.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description Table 29: Signal description Function Signal name IO Signal form and level Comment SIM interface specified for use with 3V SIM card CCIN I RI ≈ 100kΩ VILmax = 0.6V at I = -25µA VIHmin = 2.1V at I = -10µA VOmax = 3.05V CCIN = Low, SIM card holder closed CCRST O RO ≈ 47Ω VOLmax = 0.25V at I = +1mA VOHmin = 2.5V at I = -0.5mA VOHmax = 2.95V Maximum cable length or copper track 100mm to SIM card holder.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description Table 29: Signal description Function Signal name IO Signal form and level Comment SIM interface specified for use with 1.8V SIM card CCIN I RI ≈ 100kΩ VILmax = 0.6V at I = -25µA VIHmin = 2.1V at I = -10µA VOmax = 3.05V CCIN = Low, SIM card holder closed CCRST O RO ≈ 47Ω VOLmax = 0.25V at I = +1mA VOHmin = 1.45V at I = -0.5mA VOHmax = 1.90V Maximum cable length or copper track 100mm to SIM card holder.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description Table 29: Signal description Function Signal name IO Signal form and level Comment USB VUSB_IN I VINmin = 4.0V VINmax = 5.25V USB_DN I/O USB_DP I/O Differential Output Crossover voltage Range VCRSmin = 1.5V, VCRSmax = 2.0V All electrical characteristics according to USB Implementers’ Forum, USB 2.0 Full Speed Specification.
s XT65/XT75 Hardware Interface Description 7.5 Pin Assignment and Signal Description Table 29: Signal description Function Signal name IO Signal form and level Comment O VOLmax = 0.2V at I = 2mA VOHmin = 2.55V at I = -0.5mA VOHmax = 3.05V PWM signal which can be smoothed by an external filter. Use the AT^SWDAC command to open and configure the DAC_OUT output. VMIC O VOmin = 2.4V VOtyp = 2.5V VOmax = 2.6V Imax = 2mA Microphone supply for customer feeding circuits EPP2 O EPN2 O 3.
s XT65/XT75 Hardware Interface Description 7.6 Power Supply for Active GPS Antenna 7.6 Power Supply for Active GPS Antenna The following table describes the electrical characteristics at the GPS antenna connector. Table 30: Power Supply for active GPS Antenna Function Signal name IO GPS Antenna Antenna connector IO Signal form and level Comment VOmin = 3.0V VOtyp = 3.3V VOmax = 3.4V Imax = 20mA Power supply for external active GPS antenna.
s XT65/XT75 Hardware Interface Description 7.7 Power Supply Ratings 7.7 Power Supply Ratings Table 31: Power supply ratings Parameter Description Conditions Min Typ Max Unit BATT+ Supply voltage Directly measured at module. 3.3 3.8 4.5 V 400 mV @ f<200kHz 50 mV @ f>200kHz 2 mV Voltage must stay within the min/max values, including voltage drop, ripple, spikes.
s XT65/XT75 Hardware Interface Description 7.7 Power Supply Ratings Table 32: Current consumption during Tx burst for GSM 850MHz and GSM 900MHz (w/o GPS) Mode GSM call GPRS Class 8 GPRS Class10 GPRS Class 12 EGPRS Class 8 EGPRS Class 10 Timeslot configuration 1Tx / 1Rx 1Tx / 4Rx 2Tx / 3Rx 4Tx / 1Rx 1Tx / 4Rx 2Tx / 3Rx RF power nominal 2W (33dBm) 2W (33dBm) 2W (33dBm) 0.5W (27dBm) 0.5W (27dBm) Radio output power reduction with AT^SCFG, parameter = 1 ... 3 = 1 ...
s XT65/XT75 Hardware Interface Description 7.7 Power Supply Ratings Table 33: Current consumption during Tx burst for GSM 1800MHz and GSM 1900MHz (w/o GPS) Mode GSM call GPRS Class 8 GPRS Class10 GPRS Class 12 EGPRS Class 8 EGPRS Class 10 Timeslot configuration 1Tx / 1Rx 1Tx / 4Rx 2Tx / 3Rx 4Tx / 1Rx 1Tx / 4Rx 2Tx / 3Rx RF power nominal 1W (30dBm) 1W (30dBm) 1W (30dBm) 0.5W (27dBm) 0.5W (27dBm) 0.25W (24dBm) 0.4W (26dBm) 0.
s XT65/XT75 Hardware Interface Description 7.8 Electrical Characteristics of the Voiceband Part 7.8 Electrical Characteristics of the Voiceband Part 7.8.1 Setting Audio Parameters by AT Commands The audio modes 2 to 6 can be adjusted according to the parameters listed below. Each audio mode is assigned a separate set of parameters.
XT65/XT75 Hardware Interface Description 7.8 Electrical Characteristics of the Voiceband Part 7.8.2 s Audio Programming Mode The audio programming model shows how the signal path can be influenced by varying the AT command parameters. The parameters inBbcGain and inCalibrate can be set with AT^SNFI. All the other parameters are adjusted with AT^SNFO. Figure 49: Audio programming model XT65_XT75_HD_v01.
s XT65/XT75 Hardware Interface Description 7.8 Electrical Characteristics of the Voiceband Part 7.8.3 Characteristics of Audio Modes The electrical characteristics of the voiceband part depend on the current audio mode set with the AT^SNFS command. All values are noted for default gains e.g. all parameters of AT^SNFI and AT^SNFO are left unchanged. Table 35: Voiceband characteristics (typical) Audio mode no.
s XT65/XT75 Hardware Interface Description 7.8 Electrical Characteristics of the Voiceband Part 7.8.4 Voiceband Receive Path Test conditions: • • The values specified below were tested to 1kHz with default audio mode settings, unless otherwise stated. Default audio mode settings are: mode=5 for EPP1 to EPN1 and mode=6 for EPP2 to EPN2, inBbcGain=0, inCalibrate=32767, outBbcGain=0, OutCalibrate=16384 (volume=4) or OutCalibrate=11585 (volume=3), sideTone=0.
s XT65/XT75 Hardware Interface Description 7.8 Electrical Characteristics of the Voiceband Part Table 36: Voiceband receive path Parameter Frequency Response Min 0Hz - 100Hz 200Hz 300Hz - 3350Hz 3400Hz 4000Hz >4400Hz 1. 2. 3. 4. Typ Max Unit -34 dB Test condition / remark 4 -1.1 0.1 -0.2 -0.7 -39 -75 Full scale of EPP2/EPN2 is lower than full scale of EPP1/EPN1 but the default gain is the same. 3.14dBm0 will lead to clipping if the default gain is used.
s XT65/XT75 Hardware Interface Description 7.8 Electrical Characteristics of the Voiceband Part 7.8.5 Voiceband Transmit Path Test conditions: • • The values specified below were tested to 1kHz and default settings of audio modes, unless otherwise stated. Parameter setup: Audio mode=5 for MICP1 to MICN1 and 6 for MICP2 to MICN2, inBbcGain=0, inCalibrate=32767, outBbcGain=0, OutCalibrate=16384, sideTone=0 Table 37: Voiceband transmit path Parameter Min Full scale input voltage (peak to peak) for 3.
s XT65/XT75 Hardware Interface Description 7.9 Air Interface 7.9 Air Interface Test conditions: All measurements have been performed at Tamb= 25×C, VBATT+ nom = 4.0V. The reference points used on XT65/XT75 are the BATT+ and GND contacts (test points are shown in Figure 4).
s XT65/XT75 Hardware Interface Description 7.10 Electrostatic Discharge 7.10 Electrostatic Discharge The GSM engine is not protected against Electrostatic Discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates a XT65/XT75 module.
XT65/XT75 Hardware Interface Description 8 Mechanics 8 Mechanics 8.1 Mechanical Dimensions of XT65/XT75 s Figure 50 shows the top view of XT65/XT75 and provides an overview of the board's mechanical dimensions. For further details see Figure 51. Length: 59.00mm Width: 34mm Height: 3.5mm Pin1 Pin80 Figure 50: XT65/XT75– top view XT65_XT75_HD_v01.
s XT65/XT75 Hardware Interface Description 8.1 Mechanical Dimensions of XT65/XT75 Figure 51: Dimensions of XT65/XT75 (all dimensions in mm) XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 8.2 Mounting XT65/XT75 to the Application Platform 8.2 s Mounting XT65/XT75 to the Application Platform There are many ways to properly install XT65/XT75 in the host device. An efficient approach is to mount the XT65/XT75 PCB to a frame, plate, rack or chassis. Fasteners can be M2 screws plus suitable washers, circuit board spacers, or customized screws, clamps, or brackets.
XT65/XT75 Hardware Interface Description 8.3 Board-to-Board Application Connector 8.3 s Board-to-Board Application Connector This section provides the specifications of the 80-pin board-to-board connector used to connect XT65/XT75 to the external application. Connector mounted on the XT65/XT75 module: Type: 52991-0808 SlimStack Receptacle 80 pins, 0.50mm pitch, for stacking heights from 3.0 to 4.0mm, see Figure 52 for details. Supplier: Molex, http//www.molex.
XT65/XT75 Hardware Interface Description 8.3 Board-to-Board Application Connector s Mating connector types for the customer's application offered by Molex: • • 53748-0808 SlimStack Plug, 3mm stacking height, see Figure 53 for details. 53916-0808 SlimStack Plug, 4mm stacking height Note: There is no inverse polarity protection for the board-to-board connector. It is therefore very important that the board-to-board connector is connected correctly to the host application, i.e.
XT65/XT75 Hardware Interface Description 8.3 Board-to-Board Application Connector s Figure 52: Molex board-to-board connector 52991-0808 on XT65/XT75 XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 8.3 Board-to-Board Application Connector s Figure 53: Mating board-to-board connector 53748-0808 on application XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 9 Sample Application 9 s Sample Application Figure 54 shows a typical example of how to integrate a XT65/XT75 module with an application. Usage of the various host interfaces depends on the desired features of the application. Audio interface 1 demonstrates the balanced connection of microphone and earpiece. This solution is particularly well suited for internal transducers.
s XT65/XT75 Hardware Interface Description Figure 54: XT65/XT75 sample application XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 10 Reference Approval 10 Reference Approval 10.1 Reference Equipment for Type Approval s The Siemens reference setup submitted to type approve XT65/XT75 consists of the following components: • • • • • • • Siemens XT65/XT75 cellular engine Development Support Box DSB75 SIM card reader integrated on DSB75 U.FL-R-SMT antenna connector and U.FL-LP antenna cable Handset type Votronic HH-SI-30.3/V1.
XT65/XT75 Hardware Interface Description 10.2 Compliance with FCC Rules and Regulations 10.2 s Compliance with FCC Rules and Regulations The Equipment Authorization Certification for the Siemens reference application described in Section 10.
XT65/XT75 Hardware Interface Description 11.1 List of Parts and Accessories 11 Appendix 11.
XT65/XT75 Hardware Interface Description 11.1 List of Parts and Accessories s Table 42: Molex sales contacts (subject to change) Molex Molex Deutschland GmbH American Headquarters For further information please click: Felix-Wankel-Str. 11 4078 Heilbronn-Biberach Germany Lisle, Illinois 60532 U.S.A. http://www.molex.com Phone: +49-7066-9555 0 Fax: +49-7066-9555 29 Email: mxgermany@molex.com Molex China Distributors Beijing, Room 1319, Tower B, COFCO Plaza No.
XT65/XT75 Hardware Interface Description 11.2 Fasteners and Fixings for Electronic Equipment 11.2 s Fasteners and Fixings for Electronic Equipment This section provides a list of suppliers and manufacturers offering fasteners and fixings for electronic equipment and PCB mounting. The content of this section is designed to offer basic guidance to various mounting solutions with no warranty on the accuracy and sufficiency of the information supplied.
XT65/XT75 Hardware Interface Description 11.2 Fasteners and Fixings for Electronic Equipment Article number: 07.51.403 s Insulating Spacer for M2 Self-gripping1 Length 3.0mm Material Polyamide 6.6 Surface Black Internal diameter 2.2mm External diameter 4.0mm Flammability rating UL94-HB 1. 2 spacers are delivered with DSB75 Support Board Article number: 05.11.209 Threaded Stud M2.5 - M2 Type E / External thread at both ends Length 3.
XT65/XT75 Hardware Interface Description 11.2 Fasteners and Fixings for Electronic Equipment Article number: 01.14.131 s Screw M21 DIN 84 - ISO 1207 Length 8.0mm Material Steel 4.8 Surface Zinced A2K Thread M2 Head diameter D = 3.8mm Head height 1.30mm Type Slotted cheese head screw 1. 2 screws are delivered with DSB75 Support Board Article number: 01.14.141 Screw M2 DIN 84 - ISO 1207 Length 10.0mm Material Steel 4.8 Surface Zinced A2K Thread M2 Head diameter D = 3.
XT65/XT75 Hardware Interface Description 11.3 Data Sheets of Tested Batteries Article number: 02.10.011 s Hexagon Nut1 DIN 934 - ISO 4032 Material Steel 4.8 Surface Zinced A2K Thread M2 Wrench size / Ø 4 Thickness / L 1.6mm Type Nut DIN/UNC, DIN934 1. 11.3 2 nuts are delivered with DSB75 Support Board Data Sheets of Tested Batteries The following two data sheets have been provided by VARTA Microbattery GmbH. Click here for sales contacts and further information: http://www.
s XT65/XT75 Hardware Interface Description 11.3 Data Sheets of Tested Batteries Figure 56: Lithium Ion battery from VARTA XT65_XT75_HD_v01.
s XT65/XT75 Hardware Interface Description 11.3 Data Sheets of Tested Batteries 8 F 7 6 4 3 40 d/s adhesive tape Nomex 0.18x8x32 50 d/s adhesive tape Nomex 0.18x5x32 90 tag 0.1x3x25 60 d/s adhesive tape Nomex 30 0.18x4x27 Ni-tag (0.07x4x15mm) 80 PCM D A 20 adhesive tape Kapton 0.055x8x18 130 wire black(-) AWG 24 150 sumitube (2x) 140 wire white(NTC) AWG24 +0 37 - 0,5 110 adhesive tape Kapton 0.055x6x28 (2x) 120 wire red(+) AWG24 0,2 58,5 +- 0,3 5 +- 0,1 0,2 C B 1 1.
XT65/XT75 Hardware Interface Description 11.4 Mounting Advice Sheet 11.4 s Mounting Advice Sheet To prevent mechanical damage, be careful not to force, bend or twist the module. Be sure it is positioned flat against the host device. The advice sheet on the next page shows a number of examples for the kind of bending that may lead to mechanical damage of the module. XT65_XT75_HD_v01.
XT65/XT75 Hardware Interface Description 11.4 Mounting Advice Sheet XT65_XT75_HD_v01.
