Personal Computer User Manual

Technical data of CPU 31x
7.6 CPU 317-2 DP
CPU 31xC and CPU 31x, Technical data
7-28 Manual, Edition 08/2004, A5E00105475-05
Technical data
FCs See the Instruction List
Number
2048
(FC 0 to FC 2047)
Length
64 KB
Address areas (I/O)
Total I/O address area max. 8192 bytes/8192 bytes
(can be freely addressed)
Distributed max. 8192 bytes
I/O process image 256/256
Digital channels 65536/65536
of those local Max. 1024
Analog channels 4096/4096
of those local 256/256
Assembly
Racks Max. 4
Modules per rack 8
Number of DP masters
Integrated
2
via CP
2
Number of function modules and communication processors you can operate
FM
Max. 8
CP (PtP)
Max. 8
CP (LAN)
Max. 10
Time-of-day
Real-time clock Yes (HW clock)
Buffered
Yes
Buffered period
Typically 6 weeks (at an ambient temperature of
104 °F)
Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
Accuracy
Deviation per day: < 10 s
Operating hours counter 4
Number
0 to 3
Value range
2
31
hours
(if SFC 101 is used)
Granularity
1 hour
Retentive
yes; must be manually restarted after every
restart
Clock synchronization Yes
In the PLC
Master/slave
On MPI
Master/slave