Technical data

Hardware Information
6-8
SIMATIC Panel PC 670 Computing Unit Equipment Manual
Edition 12/01
6.4 Interrupt Assignment
Interrupt assignment
Handling of the 16 hardware interrupts (IRQ 0 to IRQ 15) is taken care of by two
type 82C59 integrated interrupt controllers on the computing unit.
The INT output of the slave controller is connected to the IRQ 2 input of the master
controller. Interrupt 9 (IRQ 9) can be used on the bus for the assigned interrupt 2
(IRQ 2). IRQ 9 parameters are set to the software interrupt vector 0A H (IRQ 2) in
the initialization phase by the ROM BIOS.
Priority
The interrupts are prioritized in the reverse order of their numbering. Interrupt
IRQ 0 has the highest priority and interrupt IRQ 7 the lowest. For triggering IRQ 2,
interrupt IRQ 8 has the highest priority and IRQ 15 the lowest. Interrupts IRQ 8 to
IRQ 15 therefore have higher priorities than interrupts IRQ 3 to IRQ 7. The
interrupt vectors are initialized and masked when the computing unit is powered
up.