Specifications

4 Communication settings and guide of HMI connecting with controller
Auxiliary Register ------ M 0-9999 DDDD
I/O Register ------ P 0-9999 DDDD
LS XGB CPU Direct
Device
Bit Address
Word Address
Format
A_Bit 0.0-8191.F
-------
DDDD.H
Special Relay
F_Bit 0.0-1023.F
-------
DDDD.H
W_Bit 0.0-10239.F
-------
DDDDD.H
Same area with R
File Relay
R_Bit 0.0-10239.F
-------
DDDDD.H
Special module Relay
U_Bit 0.0-511.F
-------
DDD.H
Keep Relay
K_Bit 0.0-4095.F
-------
DDDD.H
Link Relay
L_Bit 0.0-2047.F
-------
DDDD.H
Auxiliary Relay
M_Bit 0.0-4095.F
-------
DDDD.H
Output Relay
Q_Bit 0.0-1023.F
-------
DDDD.H
Input Relay
I_Bit 0.0-1023.F
-------
DDDD.H
-------
A 0-8191
DDDD
Special Register
-------
F 0-1023
DDDD
-------
W 0-10239
DDDDD
File Register
-------
R 0-10239
DDDDD
Special module Register
-------
U 0-511
DDD
Keep Register
-------
K 0-4095
DDDD
Link Register
-------
L 0-2047
DDDD
Auxiliary Reguster
-------
M 0-4095
DDDD
Output Register
-------
Q 0-1023
DDDD
Input Register
-------
I 0-1023
DDDD
LS GLOFA Cnet
Device Bit Address Word Address Format Notes
Buffer Memory(Bit)
MX0-32767
------
DDDDD
Output(Bit)
QX0-1763
------
DDDD
Input(Bit) IX0-1763 ------ DDDD
Buffer Memory(Dword) ------
MD0-16368 DDDDD
Output(Dword)
------
QD0.0-17.1
DD.D
Input(Dword) ------ ID0.0-17.1 DD.D
Buffer Memory(Word) ------ MW0-32767 DDDDD
Output(Word) ------ QW0.0-17.3 DD.D
Input(Word) ------ IW0.0-17.3 DD.D
LS GLOFA FEnet
Device Bit Address Word Address Format Notes
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