Specifications

IP 240 Position Decoding
PRA2 : KM 0000 0000 Assignment of a process interrupt to bits in the status area
0000 0000 Bit n= 1 A process interrupt is generated when status bit is ”1”
- Bit n= 0 No process interrupt is generated when status bit is ”1”
0000 0000
0000 0111 Bit 0 : Assignment of a counting range violation to a process
interrupt
Bit 1 : Assignment of a zero mark error to a process interrupt
Bit 2 : Assignment of a wirebreak/short-circuit in the encoder
lines to a process interrupt
PAFE : QB Flag byte or output byte (0 to 239) for flagging errors ( Section
6.4)
BER : KF 0 Addressing in the I/O area (P area)
1 Addressing in the extended I/O area (Q area)
ABIT : KY x, y x=0 to 255 x>0 : Branch to the interrupt OB on every signal transition of the
interrupt bit.
x=0 : Branch to the interrupt OB only on a 0 to 1 signal transi-
tion of the interrupt bit
y=0 to 7 Interrupt bit reserved in I/O byte 0 as set on switchbank S1
Note
Process interrupts are not disabled in the configuring function blocks. When using
an S5-115U, S5-135U (when set for interrupt servicing at block boundaries) or
S5-155U (155U mode), you must write your STEP 5 program so that the configuring
FBs cannot be interrupted. Process interrupts are disabled in all restart OBs.
Increase in cycle time due to configuring.
Because channel configuring increases the module firmware's cycle time, you must
write your STEP 5 program so that the other channel is in a safe wait state while the
configuring FB is executing.
EWA 4NEB 811 6120-02a 7-21