Specifications

6 Functional Description
7 Position Decoding
8 Counting
9 IP 252 Expansion
10 Positioning
11 Direct Data Interchange with the IP 240
12 Response Times
13 Encoder Signals
14 Error Messages
5 Operation
5.1 Settings for Interrupt Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5- 2
5.1.1 IRx Interrupt Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5- 2
5.1.2 I/O Byte 0 (PY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5- 3
5.2 Output Inhibit (BASP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5- 6
5.3 Matching to Encoder Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5- 7
5.3.1 Settings for Symmetrical or Asymmetrical Signals . . . . . . . . . . . . . . . 5 - 7
5.3.2 Settings for Encoder Signal Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5- 7
1 System Overview
2 Module Description and Accessories
3 Addressing
4 Hardware Installation
EWA 4NEB 811 6120-02a