Specifications

Operation IP 240
Fig. 5-3. Allocation of Coding Switches on Switchbanks S1 and S2
to Interrupt Generation with I/O Byte 0
PB 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Switchbank S1 Switchbank S2
21 3 765 84
on
off
I/O byte 0.0 to 0.7
Master or Slave
Enable for I/O byte 0
87
on
off
The coding switches on banks S1 and S2 shown in Fig. 5.3 have the following meaning:
on: The corresponding bit of I/O byte 0 is set in response to an interrupt signal on the I/O
module. And on a master module: the corresponding bit of I/O byte 0
is not reserved by a slave module.
on: The I/O module is operated as slave
off: The I/O module is operated as master
on: Enabling of interrupt generation over I/O byte 0
Warning
No input module may be set to address IB 0 when I/O byte 0 is enabled with switch
S2.8.
In additon to switch S1.1, only one other switch (S1.2 to S1.8) may be closed on
switchbank S1.
In the S5-155U, process interrupt generation via I/O byte 0 must also be enabled in
DX 0.
Calling the interrupt OBs in the S5-150U and S5-155U (150 mode)
In the S5-150U and S5-155U (150 mode), a change in one of the bits in I/O byte 0 invokes the
corresponding interrupt OB at the next block boundary. When you initialize the module with
function blocks 167, 169, and 171 ( Sections 10.23.2 and 8.3.1), you can set the ABIT parameter
to specify whether the interrupt OB is to be invoked after every signal change or only when the
bit goes from 0 to1.
ABIT parameter:
ABIT : KY x,y
• x>0 : The interrupt OB is invoked on every signal change.
• x=0, y=0 to 7 : The interrupt OB is invoked only on a signal change from 0 to 1.
Y is the number of the bit in I/O byte 0 which you have set on switchbank
S1.
5-4 EWA 4NEB 811 6120-02