Specifications

C-29
IP 240
EWA 4NEB 811 6120-02b
The inputs and outputs are mapped onto memory bits at the beginning and
end of OB 1. Within the test program, only the memory bits are used.
Signal Memory Bit Description
I 2.0 M 180.0 Execute function
I 2.1 M 180.1 Write zero displacement
I 2.2 M 180.2 Disable/enable interrupts
I 2.3 M 180.3 Delete interrupt display
I 2.4 – Unassigned
I 2.5 – Unassigned
I 2.6 – Unassigned
I 2.7 – Unassigned
Signal Memory Bit Description
Q 2.0 M 181.0 Execute function
Q 2.1 M 181.1 –
Q 2.2 M 181.2 Interrupts have been enabled
Q 2.3 M 181.3 Interrupt display
Q 2.4 – Unassigned
Q 2.5 – Unassigned
Q 2.6 – Unassigned
Q 2.7 M 181.7 Error has occurred
The following memory areas are also occupied:
Bit Memory Address
Area
Description
MB 182 Edge memory bit
MB 182 Error memory bit
MB 184 bis MB 189 Error bytes of the PAFE parameter
Addresses
IP 240 Counter, Position Decoder and Positioning Module