Specifications

C-16
IP 240
EWA 4NEB 811 6120-02b
The inputs and outputs are mapped onto memory bits at the beginning and
end of OB 1. Within the test program, only the memory bits are used.
Signal Memory Bit Description
I 3.0 M 170.0 Start/stop counting
I 3.1 M 170.1 Write count starting value
I 3.2 M 170.2 Disable/enable interrupts
I 3.3 M 170.3 Delete interrupt display
I 3.4 – Unassigned
I 3.5 – Unassigned
I 3.6 – Unassigned
I 3.7 – Unassigned
Signal Memory Bit Description
Q 3.0 M 171.0 Counting has been enabled
Q 3.1 M 171.1 –
Q 3.2 M 171.2 Interrupts have been enabled
Q 3.3 M 171.3 Interrupt marker
Q 3.4 – Unassigned
Q 3.5 – Unassigned
Q 3.6 – Unassigned
Q 3.7 M 171.7 Error has occurred
The following memory areas are also occupied:
Bit Memory Address
Area
Description
MB 172 Edge memory bit
MB 173 Error memory bit
MB 174 to MB 179 Error bytes of the PAFE parameter
Addresses
IP 240 Counter, Position Decoder and Positioning Module