Specifications

C-15
IP 240
EWA 4NEB 811 6120-02b
The following interrupt settings are required in the CPU:
 Process interrupt: OB 40,
 Interrupt: I1 (S5 assignment: IA)
“Counting” mode:
S1 S2 S3 S4 S5 S6
1
1 1 1 1 1
2 2 2 2 2 2
3 3 3 3 3 3
4 4 4 4 4 4
5 5 off on off on off on off on
6 6
7 7 = required switch setting
8
8
off on off on
 S1: No process interrupts via IB 0
 S2: Interrupt circuit A, I/O area P
 S3: I/O address 0
 S4: Sensor signals asymmetrical
 S5: Sensor signals +24 V (channel 1)
 S6: Sensor signals + 24 V (channel 2)
For the programming example, the data block DB 172 “C_data” is used. It
has the same format as the corresponding standard data block. The data nec-
essary for the example has also been entered.
The following blocks are used:
Block Name Purpose
OB 1 Cycle Cyclic program processing
OB 40 Interrupt Interrupt processing
OB 100 Start-up Start-up processing for restart
DB 172 C_data Data block for counting
FC 171 STRU_DOS Configuring block
FC 172 STEU_DOS Control block
Settings on the
IP 240
Blocks
IP 240 Counter, Position Decoder and Positioning Module