Specifications

B-4
IP 240
EWA 4NEB 811 6120-02b
The CPU and an IP (an IP being an intelligent I/O module) interchange data
via the S5 bus interface and a 2 Kbyte dual-port RAM which is divided into
two “pages”.
The addressing area in which the pages are located is set at the factory. You
need only set the page number for the first page on the module.
A module’s two pages always reserve two consecutive numbers. The IP thus
knows the address for the second page automatically.
The same addressing area is set for page addressing on each module at the
factory.
When you configure your hardware with STEP 7, you must enter the
following parameters in the input area:
S7 address: Logical address
S5 address: 0 (value range from 0 to 255, may not appear
more than once in the specified area)
Length: 0
Process image
subarea: 0
Area: P (value range P, Q, IM3, IM4)
An IPxxx requires 32 addresses in order to pass the required parameters.
Only the start address of the module need be set. The next 31 addresses are
reserved by an internal decoding procedure, and are then no longer available
for other modules. The addresses can be set in increments of 32.
A module’s input and output addresses (S5 and S7) must be identical. This is
a prerequisite which must be observed to ensure proper use of the standard
function blocks.
When you configure your hardware with STEP 7, you must enter the follow-
ing parameters in the input and output areas:
S7 address: Must be a logical address equal to or greater than
512 (which you can use in your application
program to reference the module)
S5 address: Same as on the module
Length: 32 bytes
Process image
subarea: 0
Area: Depends on the area set on the module or
IM 314 (P, Q, IM3 or IM4)
The address of the IP 244 may not lie within the process image. There are
two ways to ensure this:
Set an S7 address equal to or greater than 512
Select a process image subarea value equal to or greater than 0
Example of
Addressing in the
Page Area
Example for
Addressing in the
P Area
Addressing S5 Modules