Specifications
12-1. Firmware Execution Times, Position Decoding Mode . . . . . . . . . . . . . . . . . . . 12 - 4
12-2. Firmware Execution Times, Counting Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 - 5
12-3. Firmware Execution Times, Positioning Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 12 - 6
Tables
12-1. Structure of a Firmware Cycle (Example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 - 1
12-2. Computing the Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 - 2
12-3. Response Time for Evaluation of the Actual Value
and of Wirebreak and Zero Mark Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 - 3
12-4. Response Time for Evaluation of Inputs IN and GT . . . . . . . . . . . . . . . . . . . . . . 12 - 3
Figures
EWA 4NEB 811 6120-02a