Specifications

IP 240 Direct Data Interchange with the IP 240
REF2 =1 Final value was stored
UEBL =1 Actual value out of range (
<- 9,999)
UEBE =1 Final value out of range (
<- 9,999)
UEBS = 1 Final value overwritten without being read
SG =1 Actual value is negative
=0 Actual value is positive
SGF =1 Final value is negative
=0 Final value is positive
Read interrupt request bytes
The IP 240 makes the interrupt request bytes for both channels available in the transfer buffer
when you transfer job number 31
H
to the job request register.
Table 11-9. Contents of the Transfer Buffer on Reading Interrupt Request Bytes, Counting Mode
Interrupt request bytes for
channel 2
0 . . . 0 0 . . . 0
Bit
76543210
Description
0
1
2
3
4 to 14
Offset
transfer
buffer
Interrupt request bytes for
channel 1
000000RF2 RF1
00000UBS0UEB
00000UBS0UEB
000000RF2 RF1
Description of the interrupt bits
RF1 =1 The interrupt was triggered because bit REF1 went to ”1”
RF2 =1 The interrupt was triggered because bit REF2 went to ”1”
UEB =1 The interrupt was triggered by a counter overflow
UBS =1 The interrupt was triggered because status bit UEBS went to ”1”
Note
To prevent the interrupt OB from being invoked twice, you must reset the relevant
bit in system data 0 in the S5-150U and S5-155U (150 mode) immediately after
reading the interrupt request bytes. For this the FB 42 is available to you.
EWA 4NEB 811 6120-02a 11-15