Specifications

IP 240 Positioning
Warning
Cyclic synchronization is also allowed when the IP outputs are set. The position
transferred goes into force immediately on an IN signal. The states of the outputs
may thus change instantaneously, causing a short-term overlap.
A bounce-free switching element must be used to generate the IN signal.
10.13.4 Transferring Control Bits to Select a Synchronization Mode
Note the following when initializing the control bits to select a synchronization mode:
• You can select only one synchronization mode at a time.
• You must take configuring parameter DAV into account when initializing control bits DA1S
and DA2S. The following bit combinations are permitted:
DAV
=0
DA1S DA2S
10
DA1S DA2S
01
DAV
=1
DA1S DA2S
11
DA1S DA2S
01
DAV
=2
DA1S DA2S
10
DA1S DA2S
01
When transferring control bits for selecting a reference point approach, note that
• you may not transfer a position number with the control bits and
• the IP outputs must be disabled.
The following error flags are set when illegal bit combinations are transferred to the IP 240. Such
illegal bit combinations are rejected.
Table 10-16. Contents of the DB and the Transfer Buffer for the Transfer of Control Bits
Bit
76543210
Description
Data byte
Data
block
Offset
in transfer
buffer
Control bits
2AMSK ZYSY SOSY HASY DA2S DA1S HAND FREI DL 36
30 . . . 0 0 . . . 0DR 36
Tranfer of control bits without position number
with control FB 168 in direct data interchange
The new control bits must be entered in
DL 36 in the data block.
Control FB 168 must be initialized as follows:
: JU FB 168
NAME : STEU.POS
:
FKT : 20,0
You must specify the following job numbers
to transfer the control bits:
• For channel 1: 1A
H
• For channel 2: 2A
H
To write the control bits, you need only
transfer the byte with offset 2.
If you also write the byte with offset 3, you
must initialize this byte to ”0”.
EWA 4NEB 811 6120-02a 10-49