User Manual

e1851a

Siemens Building Technologies

Cerberus Division

01.2002

Masking

Different parts of the wafer are processed at different times. Areas of the wafer are masked

using either a photoresistive or light-sensitive film. This creates a surface similar to photo-

graphic paper. Masks are then precisely applied and aligned to allow the layout of the inte-

grated circuits to be located on the wafer. Using a photo-lithographic process, an intense

light beam exposes the sensitive areas of the mask.

Etching

Unwanted photo-resist material is removed using various chemicals. The remaining pat-

tern is baked and finally etched using gas plasma to ensure the required circuit layout re-

mains. At this stage the image transfer from the mask to the wafer is thoroughly checked.

Doping or ion implantation

Providing the semiconductor with the electrical characteristics required is achieved by im-

planting either phosphorous(N-type) or boron(P-type) atoms into the silicon material.

The processes indicated above are repeated many times until the required number of de-

vices have been formed on each wafer.

Dielectric deposition and metalization process

After the individual devices have been formed it is necessary to create the interconnections

between devices. These interconnections are formed by sandwiching insulating material

(dielectric) between metallic layers, masking and etching.

Passivation

A final insulating layer (passivation) is formed to protect the finished wafer from contamina-

tion. Openings will be let into this layer to permit the attachment of wire links during final

assembly. Electrical tests are conducted at this stage.

Individual chips are cut from the finished wafer using a diamond saw. External links, smaller

in diameter than the human hair, are made before encapsulation in the appropriate pack-

age. Final testing now takes place before supply to customers