Technical data

Multiport Ethernet PHY’s for ERTEC200

1.1 Introduction

ERTEC 200 has integrated a 2 channel multiport Ethernet PHY (Physical Layer Transceiver), that

supports the following transmission modes:

• 10BASE-T

• 100BASE-TX

• 100BASE-FX

It can be connected to unshielded twisted-pair (UTP) cable via external magnetics or to optical fiber

via fiber PMD modules. Internally on the ERTEC 200 it interfaces to the MAC layer through the IEEE

802.3 Standard Media Independent Interface (MII).

The core has a DSP-based architecture for signal equalization and baseline wander correction. This

helps to achieve high noise immunity and to extend UTP cable lengths.The transmission modes can

be configured for each port individually. Beside these basic modes, the following (configurable)

features are supported as well:

• Auto-negotiation

• Auto-MDI/MDIX detection

• Auto polarity

The PHYs comply to the following standards:

• IEEE802.3

• IEEE802.3u

• ANSI X3.263-1995

• ISO/IEC9314

Communication between the integrated PHYs and the integrated Ethernet MACs is realized with on-

chip MII interfaces. Internal registers of the PHYs can be accessed via the common (on-chip) serial

management interface (SMI). Furthermore certain set-ups for the PHYs can be programmed using the

system control registers that are described in \1\ Chapter 4.8. A couple of output signals per channel

is available to reflect the con

nection status via LEDs; these signals are shared with GPIO pins. The

PHYs need a 25 MHz clock that can be provided on two alternative ways:

• connect a 25 MHz quartz to the CLKP_A and CLKP_B pins

• connect a 25 MHz oscillator to the CLKP_A pin.

In order to reduce power consumption, the PHYs can be driven to a power down mode either manually

or automatically, if there is no activity on the Ethernet line.

Technical data subject to change Version 1.0.0