Technical data

List of Figures
Figure 1: PHY Block Diagram................................................................................................................................8
Figure 2: MLT-3 Encoding Example....................................................................................................................12
Figure 3: Internal and Remote Loopback Modes...............................................................................................17
Figure 4: Phase Offset Indicator Function .........................................................................................................21
Figure 5: PHY Related Interfaces ........................................................................................................................22
Figure 6: Decoupling Capacitor Usage...............................................................................................................53
Figure 7: 10BASE-T and 100BASE-TX Interface Circuit Example 1 .................................................................53
Figure 8: 10BASE-T and 100BASE-TX Interface Circuit Example 2 .................................................................54
Figure 9: Circuit for Unused 100BASE-FX Mode ...............................................................................................55
Figure 10: 100BASE-FX Interface Example ........................................................................................................56
List of Tables
Table 1: ERTEC 200 Pin function for PHY interface.................................................................................................7
Table 2: 4B/5B Code Table ....................................................................................................................................11
Table 3: Assignment of LED Signals to GPIO Pins ................................................................................................16
Table 4: PHY Interrupt Events ................................................................................................................................20
Table 5: MII (Diagnosis) Interface Signals..............................................................................................................23
Table 6: SMI (Diagnosis) Interface Signals ............................................................................................................23
Table 7: MDI Interface Signals ...............................................................................................................................24
Table 8: Other PHY Related Signals ......................................................................................................................25
Table 9: PHY internal Registers .............................................................................................................................25
Table 10: Initial Parameter Settings for PHYs ........................................................................................................26
Table 11: Basic Control Register Overview ............................................................................................................26
Table 12: Basic Control Register Description .........................................................................................................28
Table 13: Basic Status Register Overview .............................................................................................................29
Table 14: Basic Status Register Description ..........................................................................................................31
Table 15: NEC OUI Composition............................................................................................................................31
Table 16: PHY ID Number Composition .................................................................................................................31
Table 17: PHY Identifier Register REG2OUIIN Overview.......................................................................................32
Table 18: PHY Identifier Register REG2OUIIN Description....................................................................................32
Table 19: PHY Identifier Register REG3OUIIN Overview.......................................................................................32
Table 20: PHY Identifier Register REG3OUIIN Description....................................................................................32
Table 21: Auto-Negotiation Advertisement Register Overview...............................................................................33
Table 22: Auto-Negotiation Advertisement Register Description ............................................................................35
Table 23: Auto-Negotiation Link Partner Ability Register Overview – Base Page ..................................................35
Table 24: Auto-Negotiation Link Partner Ability Register Description – Base Page................................................37
Table 25: Auto-Negotiation Link Partner Ability Register Overview – Next Page ...................................................38
Table 26: Auto-Negotiation Link Partner Ability Register Description – Next Page ................................................38
Table 27: Auto-Negotiation Expansion Register Overview .....................................................................................39
Table 28: Auto-Negotiation Expansion Register Description ..................................................................................40
Table 29: Auto-Negotiation Next Page Transmit Register Overview ......................................................................41
Table 30: Auto-Negotiation Next Page Transmit Register Description ...................................................................41
Table 31: Silicon Revision Register Overview ........................................................................................................42
Table 32: Silicon Revision Register Description .....................................................................................................42
Table 33: Mode Control/Status Register Overview.................................................................................................43
Table 34: Mode Control/Status Register Description..............................................................................................44
Table 35: Special Mode Register Overview............................................................................................................45
Table 36: Special Mode Register Description.........................................................................................................46
Table 37: Special Control/Status Indication Register Overview..............................................................................47
Table 38: Special Control/Status Indication Register Description...........................................................................47
Table 39: Interrupt Source Flag Register Overview................................................................................................48
Table 40: Interrupt Source Flag Register Description.............................................................................................49
Table 41: Interrupt Mask Register Overview ..........................................................................................................50
Table 42: Interrupt Mask Register Description .......................................................................................................50
Table 43: PHY Special Control/Status Register Overview......................................................................................50
Table 44: PHY Special Control/Status Register Description...................................................................................51
Table 45: Generation of PHY-specific Supply Voltages..........................................................................................52
Table 46: Examples for Magnetics Selection..........................................................................................................54
Copyright © Siemens AG 2008. All rights reserved. Page 5 ERTEC 200 PHY
Technical data subject to change Version 1.0.0