Technical data

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Bit position Bit name R/W Function

7:5 PHY_MODE R/W PHY_MODE

Selects between different operation modes of the PHYs.

PHY_MODE PHY operation mode

000

Select 10BASE-T HD, Auto-negotiate disabled,

(initial value after hardware reset)

001

Select 10BASE-T FD, Auto-negotiate disabled

010

Select 100BASE-TX/FX HD, Auto-negotiate disa-

bled

011

Select 100BASE-TX/FX FD, Auto-negotiate disa-

bled

100

Select 100BASE-TX, HD advertised, Auto-negoti-

ate enabled

101

Select 100BASE-TX, HD advertised, Auto-negoti-

ate enabled, repeater mode

110

PHY starts in power down mode

111

uto-negotiate enabled, AutoMDIX enabled

Notes: 1. The initial value after a software reset of the PHYs, is selected by

the contents of the Pn_PHY_MODE field in the PHY_CONFIG

2. A consistent setting of both FX_MODE and PHY_MODE fields is

required; otherwise proper operation of the PHYs cannot be gua

anteed

4:0 PHY_ADD R/W PHY_ADD

Selects the internal PHY address for accesses via the management interface.

PHY_ADD PHY address setting

00000

ddress for PHY 1 is 00H, add

ess for PHY2 is 01H

(initial value after hardware reset)

00001

00010

ddress for PHY 1 is 02H, address for PHY2 is 03H

00011

... ...

11110

ddress for PHY 1 is 1EH, address for PHY2 is 1FH

11111

Note: The lowest bit of the PHY_ADD fiels is ignored; it is internally hard

wired to 0b for PHY1 and to 1b for PHY2

Table 36: Special Mode Register Description

Technical data subject to change Version 1.0.0