Technical data
Contents
Multiport Ethernet PHY’s for ERTEC200........................................................................................6
1.1 Introduction ............................................................................................................................................ 6
1.2 PHY Interface Pin Functions .................................................................................................................. 7
1.3 Functional Description............................................................................................................................ 8
1.3.1 10BASE-T Operation ..................................................................................................................... 8
1.3.2 100BASE-TX Operation................................................................................................................. 10
1.3.3 100BASE-FX Operation................................................................................................................. 13
1.3.4 Auto Negotiation ............................................................................................................................ 14
1.3.5 Miscellaneous Functions................................................................................................................ 16
1.4 PHY Related Interfaces.......................................................................................................................... 22
1.5 PHY Register Description....................................................................................................................... 25
1.5.1 Basic Control Register ................................................................................................................... 26
1.5.2 Basic Status Register..................................................................................................................... 29
1.5.3 PHY Identifier Register REG2OUIIN.............................................................................................. 32
1.5.4 PHY Identifier Register REG3OUIIN.............................................................................................. 32
1.5.5 Auto Negotiation Advertisment Register ........................................................................................ 33
1.5.6 Auto Negotiation Link Partner Ability Register – Base Page.......................................................... 35
1.5.7 Auto Negotiation Link Partner Ability Register – Next Page........................................................... 38
1.5.8 Auto Negotiation Expansion Register ............................................................................................ 39
1.5.9 Auto Negotiation Next Page Transmit Register ............................................................................. 41
1.5.10 Silicon Revision Register ............................................................................................................... 42
1.5.11 Mode Control/Status Register........................................................................................................ 43
1.5.12 Special Mode Register................................................................................................................... 45
1.5.13 Special Conrol/Status Indication Register...................................................................................... 47
1.5.14 Interrupt Source Flag Register....................................................................................................... 48
1.5.15 Interrupt Mask Register.................................................................................................................. 50
1.5.16 PHY Special Control/Status Register.............................................................................................50
1.6 Board Design Recommendations........................................................................................................... 52
1.6.1 Supply Voltage Circuitry................................................................................................................. 52
1.6.2 10BASE-T and 100BASE-TX Mode Circuitry................................................................................. 53
1.6.3 100BASE-FX Circuitry ................................................................................................................... 56
2 Miscellaneous.........................................................................................................................57
2.1 References:............................................................................................................................................ 57
Copyright © Siemens AG 2008. All rights reserved. Page 4 ERTEC 200 PHY
Technical data subject to change Version 1.0.0










