Technical data

Technical data subject to change Version 1.0.1

2.4 Reset System of the EB 200P

The reset system of the EB 200P has 4 reset paths:

 Power On Reset:

This reset is generated during power up on the EB 200P. The RESET_N signal affects the following function

units.

 Resetting of ERTEC 200P logic

 Resetting of the PCI Express side

 Resetting of the Page Mode Flash

 Resetting of the Burst Mode Flash

 PCI Express Reset:

If the EB 200P is operated with an active host, the connected host reset signal resets just the PCI Express

interface. ERTEC 200P is not reset. This must be done later in the host software.

 Resetting the Debug Interface:

The debug interface is linked to the two reset signals SRST_N and TRST_N of the EB 200P. This enables the

debugger to initiate and monitor the reset of the following function groups.

 Host software Reset

ERTEC 200P can be reset through software running on the host PC.

The hardware reset remains active for at least 20 ms following power up.

Figure 4 RESET system diagram

2.4.1 Reset Button

The EB 200P has a reset button that initiates a manual reset of the ERTEC 200P BM Flash and PM Flash without

disconnecting the voltage supply.

2.4.2 PCI Express Reset

In PCI Express host mode, the host reset controls the evaluation board directly.

2.4.3 Watchdog and Software Reset

Additional reset events can be initiated by the watchdog or software reset. Both reset events have the same effect as

a debug reset.