Technical data
Copyright © Siemens AG 2013. All rights reserved. 13 EB 200P Manual
Technical data subject to change Version 1.0.1
Following table shows configuration jumpers for test and debugging. Pin headers are labeled X42 and X43.
Function Signal Pin
Pin
Signal
Function when
jumper is installed
Sync(0) BNC tip pin 1 2 ERTEC GPIO(9)
Sync BNC Input
Sync(1) BNC tip pin 3 4 ERTEC GPIO(0)
Sync BNC Output
Trace Trace CS bus switch OE 5 6 GND
Trace Disabled
EEPROM EEPROM CS bus switch OE 7 8 GND
EEPROM Enabled
User GPIOs User GPIOs CS bus switch OE 9 10 GND
GPIOs Enabled
UART UART CS bus switch OE 11 12 GND
UART Enabled
TEMP TEMP CS bus switch OE 13 14 GND
SPI Sensor Enabled
F_XHIF(0) FPGA_CONFIG(0) 15 16 GND
Same functionality as
Cfg(3)-Cfg(6)
F_XHIF(1) FPGA_CONFIG(1) 17 18 3.3V
F_XHIF(2) FPGA_CONFIG(2) 19 20 3.3V
F_XHIF(3)
FPGA_CONFIG(3)
21
22
GND
None NC 23 24 NC
None NC 25 26 NC
None NC 27 28 NC
None NC 29 30 NC
Table 2 Test and debug jumpers configuration
2.1.3 Boot Modes of the EB 200P
Various boot modes on the EB 200P can be set by means of jumpers X40.1/2 to X40.7/8.
The following boot modes are supported:
Boot source Boot(3) Boot(2) Boot(1) Boot(0)
NOR Flash (8bit) Open Open Close Open
NOR Flash (16bit) Open Open Close Close
NOR Flash (32bit) Open Open Open Open
XHIF Open Close Open Close
Table 3 Boot mode selection for EB200P
2.1.4 ERTEC 200P Processor and I/O
The ARM926EJ-S processor with interrupt controller is integrated in the ERTEC 200P. The processor and various
standard I/O are available to users for their applications. These include the following function groups:
ARM926EJ-S processors with
125/250 MHz operating frequency that can be set via jumpers (see Operating Modes 2.1.2)
16 Kbytes of instruction cache
16 Kbytes of data cache
256 Kbytes of data TCM
JTAG interface for debug interface
Interrupt controller for asynchronous events (96 IRQ and 8 FIQ inputs)
SDRAM controller 125 MHz/max. 256 Mbytes of address space (16/32-bit data width can be assigned)
SRAM controller, up to 4 x 16 Mbytes (8/16/32-bit data width and timing can be assigned separately for all 4
areas)
2x Watchdog timer unit for monitoring module functions
Timer unit for generating periodic trigger pulses
F-timer for fail-safe applications
GPIO ports for activating LEDs, etc.
SPI interface for connecting serial EEPROM/Flash
4x UART