Technical data
The D-TCM with a maximum size of 4 Kbytes can be displayed on any aligned address area. The ARM946E-S then
accesses the D-TCM under this address and not the AHB bus. In addition, the locked I-cache of 2/4/6 Kbytes can be
displayed on any aligned address area.
Only the ARM946E-S can access both address areas.
IRT accesses to the KRAM do not use the AHB bus. These accesses are implemented in the IRT switch controller.
The KRAM can be addressed starting from the memory area 0x1010_0000. An access in the non-permissible register
area is detected by an IRT-internal error signal and not by an AHB acknowledgement time-out error.
3.2 Detailed Memory Description
The table below presents a detailed description of the memory segments. Mirrored segments should not be used for
addressing to ensure compatible memory expansion at a later date.
Segment Contents Size Address Area Description
0
Boot ROM (0 - 8 Kbytes)
or
EMIF SDRAM (0-128
Mbytes)
or
EMIF memory (0-64
Mbytes)
or
Locked I-cache (2/4/6
Kbytes)
256 Mbytes
0000_0000 -
0FFF_FFFF
After reset:
Boot ROM (8 Kbytes, physical;
Memory swap=00b);
After memory swap:
EMIFSDRAM (128 Mbytes, physical;
Memory swap=01b);
or
EMIF memory (64 Mbytes physical;
Memory swap=10b);
From ARM9 perspective, the locked I-
cache (2/4/6 Kbytes) or a D-TCM (4
Kbytes) can be displayed.
1
IRT switch 256 Mbytes
1000_0000 -
1FFF_FFFF
2 Mbytes, physical; 2
7
* mirrored;
- 0-1 MBytes for IRT register
- 1-2 MBytes for KRAM
2
EMIF (SDRAM) 256 Mbytes
2000_0000 -
2FFF_FFFF
64 Mbytes are mirrored
3
EMIF
I/O Bank 0
16 Mbytes
3000_0000 -
30FF_FFFF
see Table 5
EMIF
I/O Bank 1
16 Mbytes
3100_0000 -
31FF_FFFF
see Table 5
EMIF
I/O Bank 2
4 Mbytes
3200_0000 -
323F_FFFF
CPLD ( register)
EMIF
I/O Bank 2
2 Mbytes
3240_0000 -
325F_FFFF
Ethernetcontroller SMSC91C111 register
EMIF
I/O Bank 2
2 Mbytes
3260_0000 -
327F_FFFF
Ethernetcontroller SMSC91C111 data buffer
EMIF
I/O Bank 2
8 Mbytes
3280_0000 -
32FF_FFFF
external periphery and memory expansion
EMIF
I/O Bank 3
16 Mbytes
3300_0000 -
33FF_FFFF
When a smaller device is interfaced, mirroring
over the entire 16 Mbytes
Not used
3400_0000 -
3FFF_FFFF
4
Internal boot ROM 8 Kbytes
4000_0000-
4000_1FFF
8 Kbytes, physical
Copyright © Siemens AG 2010. All rights reserved. 24 EB 200 Manual
Technical data subject to change Version 1.1.4