Technical data

1.4 Block Diagram of the EB 200
ERTEC
200
Trace
DebuggerSYNC
Boot
FLASH
512kB
(socked)
SDRAM
2x32MB
(32Bit)
FLASH
4MB
(16 Bit)
PCI-Connector
Supply
25
MHz
External
Supply
LBU
E
M
I
F
GPIO
F
X
/
T
X
1,5V
3,3V
TX
RX
SPI
RS
232
Jumper
Jumper
Config
Jumper
Boot
CPLD
SPI
2xRJ45
with int.
Magnetics
I/O Slot
for Expansion
FPGA
PCI Bridge
PCI Target
Data Path
PCI Master
Datenpfad
LBU Connector for direct LBU Master
Interface /MII Diagnostics
SRAM
2x4MB
(32Bit)
Figure 1: Block Diagram of the EB 200
Note: On the evaluation board EB200 (hardware release ES35 and newer), that is included in the development kit
V3.2.0 and newer, the following components are no more used and no more assembled:
 NAND-Flash
 SMSC-LAN91C111 Ethernet Chip
 RJ45-female connector.
The boards are fully compatible to the prior version ES34, there are no limitations on functionality for PROFINET.
Copyright © Siemens AG 2010. All rights reserved. 10 EB 200 Manual
Technical data subject to change Version 1.1.4