User`s manual

Device Specification
Semiconductor Group 7-23
s
00 10 X1
DPTR < XRAM
address
range
MOVX
@Ri
MOVX
@DPTR
a) P0/P2Bus
b)
RD/WR active
c) ext. memory is
used
a) P0/P2
Bus
b)
RD/WR active
c) ext. memory is
used
a) P0/P2
Bus
b) RD
/WR active
c) ext. memory is
used
a) P0/P2
Bus
b) RD
/WR active
c) ext. memory is
used
a) P0/P2
Bus
b)
RD/WR active
c) ext. memory is
used
a) P0/P2
Bus
b)
RD/WR active
c) ext. memory is
used
a) P0/P2
Bus
b)
RD/WR active
c) ext. memory is
used
a) P0/P2
Bus
b)
RD/WR active
c) ext. memory is
used
modes compatible to 8051 - family
00 10 X1
XMAP1, XMAP0
EA = 0
a) P0/P2BUS
(WR -Data only)
b) RD/WR inactive
c) XRAM is used
a) P0/P2BUS
(WR -Data only)
b) RD/WR active
c) XRAM is used
a) P0/P2I/0
b)
RD/WR inactive
c) XRAM is used
a) P0/P2BUS
(WR -Data only)
b) RD/WR active
c) XRAM is used
a) P0/P2BUS
(WR -Data only)
P2I/0
b) RD/WR inactive
c) XRAM is used
a) P0/P2BUS
(WR -Data only)
P2I/0
b) RD/WR active
c) XRAM is used
a) P0
Bus
P2
I/0
b) RD/WR active
c) ext. memory is
used
a) P0/P2I/0
b)
RD/WR inactive
c) XRAM is used
a) P0BUS
(WR -Data only)
P2I/0
b) RD/WR active
c) XRAM is used
a) P0
Bus
P2
I/0
b) RD/WR active
c) ext. memory is
used
a) P0
Bus
P2I/0
b) RD/WR active
c) ext. memory is
used
a) P0
Bus
P2I/0
b)
RD/WR active
c) ext. memory is
used
a) P0Bus
P2I/0
b) RD/WR active
c) ext. memory is
used
a) P0
Bus
P2I/0
b) RD/WR active
c) ext. memory is
used
a) P0
Bus
P2I/0
b) RD/WR active
c) ext. memory is
used
DPTR XRAM
address
range
XPAGE < XRAM
addr.
page
range
XPAGE XRAM
addr.
page
range
XMAP1, XMAP0
EA = 1
a) P0Bus
P2I/0
b) RD/WR active
c) ext. memory is
used
Table 1:
Behaviour of P0/P2 and RD/WR during MOVX accesses