Specifications

AC65/AC75 Hardware Interface Description
3.15 Audio Interfaces
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AC65_AC75_HD_v01.002 Page 64 of 117 2006-10-30
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The timing of a PCM short frame is shown in Figure 29. The 16-bit TXDAI and RXDAI data are transferred simul-
taneously in both directions during the first 16 clock cycles after the frame sync pulse. The duration of a frame
sync pulse is one BITCLK period, starting at the rising edge of BITCLK. TXDAI data is shifted out at the next
rising edge of BITCLK. RXDAI data (i.e. data transmitted from the host application to the module's RXDAI line)
is sampled at the falling edge of BITCLK.
Figure 29: Short Frame PCM timing
The timing of a PCM long frame is shown in Figure 30. The 16-bit TXDAI and RXDAI data are transferred simul-
taneously in both directions while the frame sync pulse FS is high. For this reason the duration of a frame sync
pulse is 16 BITCLK periods, starting at the rising edge of BITCLK. TXDAI data is shifted out at the same rising
edge of BITCLK. RXDAI data (i.e. data transmitted from the host application to the module's RXDAI line) is sam-
pled at the falling edge of BITCLK.
Figure 30: Long Frame PCM timing