Specifications
Data
Field
-
Sync
is
a fixed number of bytes for separator synchronization prior to
the
address mark. In-
cludes a minimum of two bytes plus worst case separator sync
up
requirements.
Gap
3-
Gap
4-
D
Pre
Data
Address
Mark
(MFM)
is
three bytes of
Al
with unique clock bits not written
per
the
encode
rules.
See
figure 6-13.
Data
Address
Mark
(FM)
is
a unique byte to identify the Data Field
and
is
not written
per
the
encode
rules.
See
figures
6-14
and
6-15.
Data
Address
Mark
(MFM)
is
one
byte of
FB
or
F8
and
it
is
written
per
the
encode
rules.
See
figure
6-16
and
6-17.
Data
is
the area for user data.
CRC
is
two bytes for cyclic redundancy check.
WG
OFF
(Write
Gate
Off)
is
one
byte to allow for the WRITE GATE turn off after an up-
date write.
Gap
3
is
from WG OFF to the next 10
AM
sync
and
allows for
the
erase core to clear the
Data Field CRC bytes,
speed
and
write oscillator variation, read preamplifier recovery time,
and
system turn
around
time to read the following
ID
Field.
G48
is
the last gap prior to physical index
and
allows for
speed
and
write oscillator variation
during a format write
and
physical index variation.
D
C
C
D
Jl
n
n
n n
BIT
~ELL
I BIT
~ELL
I
BINARY
REPRESENTATION OF:
DATA BITS
CLOCK BITS
BIT CELL
I BIT CELL
2 3
I BIT
~ELL
I BIT
~ELL
INDEX
PRE
ADDRESS MARK
o
o
o o
o
o
o
o o o
o
BIT
~ELL
I
BIT CELL
7
HEXADECIMAL
REPRESENTATION
OF:'
C2
14
50574·33
FIGURE 6·8. MFM INDEX
PRE
ADDRESS MARK
C D C D
D C D D
CDC
C
BIT CELL BIT
CELL
BIT CELL BIT CELL BIT CELL BIT
CELL
BIT CELL BIT CELL BIT
CELL
BIT CELL
7
a 1 2 3 4 5 6 7 a
~-----------------------------------------INDEXADDRESSMARKBYTE--------------------------------~~
BINARY
REPRESENTATION OF:
DATA BITS
CLOCK BITS
1
a
a
o
FIGURE 6·9. INDEX ADDRESS MARK FM
6-6
HEXADECIMAL
REPRESENTATION OF:
a FC
D7
50574·34