Specifications
2.2.5
Direction
Select
This interface line
is
a control signal which defines
the
direction
of
motion
the
read/write
heads
will
take when
the
STEP
line
is
pulsed. An
open
circuit,
or
logical
one,
defines
the
direction as
"out"
and
if
a pulse
is
applied to
the
STEP
line,
the
read/write
heads
will
move
away from
the
center of the disk. Conversely,
if
this input
is
shorted
to
ground,
or
a logical zero level, the direction of motion
is
defined
as
"in"
and
if
a pulse
is
applied
to
the
STEP
line,
the
read/write
heads
will
move
towards the center of the disk. If buffered stepping
is
used,
any
changes
to
the
DIRECTION SELECT line
will
be ignored by the drive during the time step pulses(s) are
not
input.
A jumper-selectable option
is
available which allows
the
DIRECTION SELECT line to be time
shared
for both
the
DIRECTION SELECT
and
SIDE SELECT functions.
That
is,
during
head
positioning operations,
the
DIRECTION
SELECT line controls direction of
head
motion. During
read
or
write operations,
the
DIRECTION SELECT line
determines which
head
is
selected. Details regarding
the
implementation of this option
are
provided in
paragraph
7.5.
NOTE
A 16 ms delay must be introduced when changing direction (i.e.,
the
last step-in pulse
to
the
first
step-out pulse
or
vice versa).
2.2.6
Step
This interface line
is
a control signal which causes the
read/write
heads
to move with
the
direction of motion defin-
ed
by
the
DIRECTION SELECT line.
The
access motion
is
initiated
on
each logical
one
to logical zero transition
or
the leading
edge
of
the
signal pulse.
For a
standard
seek, step pulses may be received at a rate of 3
ms
minimum time between pulses having a 1
P.s
minimum pulse width. Any
change
in
the DIRECTION SELECT line must be
made
at least 1
P.s
minimum before
the
leading
edge
of
the
STEP
pulse. Refer to figure 1-3 for these timings.
Buffered stepping
may
be
done
by
issuing pulse(s) to the drive at a rate of 15
P.s
minimum
to
2.9
ms maximum time
between pulses having a 1
p'S
minimum pulse width. Pulses are stored
in
a buffer which
will
issue step
commands
to
the
drive
stepper
motor
at a 3 ms pulse rate.
The
first step begins
upon
receipt of
the
first
step
pulse. Any
change
to
the
DIRECTION SELECT line during
the
time step pulse(s) are
not
input
will
be discounted by
the
drive.
See
figure 1-4 for these timings.
2.2.7
Write
Gate
The
active state of this signal (logical zero) enables WRITE DATA to be written
on
the
diskette.
The
inactive state
(logical one) enables
the
read
data
logic (SEPARATED DATA, SEPARATED CLOCK,
and
READ DATA)
and
stepper
logic. Refer to figure 1-8 for WRITE INITIATE timing information.
2.2.8
Write Data
This interface line provides
the
data
to
be written
on
the
diskette. Each transition from a logical
one
level to a logical
zero level
will
cause
the
current through
the
read/write
head
to be reversed, thereby writing a
data
bit. This line
is
enabled by WRITE GATE being active.
See
figure 1-8 for timing information.
2.2.9
Motor On (Alternate Input)
This customer installable option,
when
enabled by jumpering trace MO
or
MMO
and
activated
to
a logical zero
level,
will
activate
the
dc spindle motor. Refer to
paragraphs
7.8
and
7.9
for uses
and
method
of
installation.
2.2.10
In
Use
(Alternate Input)
This customer installable option
will
turn
on
the
Activity LED
and
lock the door. Refer
to
paragraph
7.7
for uses
and
method
of installation.
2.2.11
External Write Current
Switch
(Alternate Input)
Reference paragraph
7.2.
2-4