User's Manual

13
CPU Pins
No. Port Name I/O Feature Description
1 P94 O Ver Frequency accuracy adjustment
2 P93 O APC/TV Transmit power/receiving sensitivity adjustment
3 P92 I Key1 NC
4 P91 I External option judgement NC
5 P90 I SELF
All reset mode control; ground this pin to enter all reset
mode
6 BYTE I VCC 8 bit external data bus
7 CNVSS I GND MCU operates in single-chip mode after reset
8 P87 I Key2 NC
9 P86 I Key3 NC
10 RESET I Reset IC MCU reset when low level is input
11 Xout O Crystal oscillator output 9.8304M crystal oscillator
12 Vss I GND Ground
13 Xin I Crystal oscillator input 9.8304M crystal oscillator
14 Vcc I VCC Power supply
15 P85 I NMI Connect with high level
16 P84 I EN0 Channel selector knob input
17 P83 I SW1 A key
18 P82 I BBP_IRQN CMX881 interrupt output
19 P81 I BBP_RPL CMX881 data output
20 P80 O BBP_CLK CMX881 clock input
21 P77 O BBP_CMD CMX881 data input
22 P76 O BBP_CSN CMX881data enable, low level: Enable
23 P75 O AUDIO_EN AF amplifier control H: Enable L: Standby
24 P74 O COM_SW Compressor enable H: Enable L: Disable
25 P73 O EXP_SW Expander enable H: Enable L: Disable
26 P72 O W/N Narrowband/wideband H: Wideband L: Narrowband
27 P71 I/O EEPROM_DATA EEPROM data
28 P70 O EEPROM_CLOCK EEPROM clock input
29 P67 O NULL NC
30 P66 O NULL NC
31 P65 I LOCK PLL unlock detect H: PLL lock L: PLL unlock
32 P64 O PLL_EN PLL IC strobe
33 P63 O TXD Serial data output
34 P62 I RXD Serial data input
35 P61 I Key4 NC
36 P60 I External option judgement NC
37 P57 O VCC Clock output, connected to high level (Null)
38 P56 NULL NC
39 P55 I VCC HOLD pin, connected to high level (Null)