Data Sheet

FSC‐BT630Datasheet
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 ShenzhenFeasycomTechnologyCo.,Ltdwww.feasycom.com
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Thisisa standardUARTinterface forcommunicatingwith otherserial devices.TheUART interfaceprovidesa simple
mechanismforcommunicatingwithotherserialdevicesusingtheRS232protocol.
When the module is connected to another digital device, UART_RX and UART_TX transfer data between the two
devices.Theremainingtwosignals,UART_CTSandUART_RTS,canbeusedtoimplementRS232hardwareflowcontrol
wherebothareactivelowindicators.
This module output is at 3.3V CMOS logic levels (tracks VCC). Level conversion must be added to interface with an
RS‐232levelcompliantinterface.
SomeserialimplementationslinkCTSandRTS
toremovetheneedforhandshaking.WedonotrecommendlinkingCTS
and RTS except for testing and prototyping. If these pins are linked and the host sends data when the FSC‐BT630
deasserts its RTS signal, there is significant risk that internal receive buffers will overflow, which could lead to
 an
internal processor crash. This drops the connection and may require a power cycle to reset the module. We
recommendthatyouadheretothecorrectCTS/RTShandshakingprotocolforproperoperation.
Full‐duplexoperation
Automatichardwareflowcontrol
Paritycheckingandgenerationforthe9thdatabit
EasyDMA
Upto1Mbpsbaudrate
ReturntoIDLEbetweentransactionssupported(whenusingHWflowcontrol)
Onestopbit
Leastsignificantbit(LSB) first
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The GPIOs used for each UART interface can be chosen from any GPIO on the device and are independently
configurable.Thisenablesgreatflexibilityindevicepinoutandefficientuseofboardspaceandsignalrouting.
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Table4:PossibleUARTSettings
Parameter PossibleValues
Baudrate
Minimum 1200baud(≤2%Error)
Standard 115200bps(≤1%Error)
Maximum 921600bps(≤1%Error)
Flowcontrol  RTS/CTS,orNone
ParityNone,OddorEven
Numberofstopbits  1
Bitsperchannel8
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Whenconnectingthemoduletoahost,pleasemakesuretofollow.
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4.8.2I2CInterface
I2C is a two‐wire, bi‐directional serial bus that provides a simple and efficient method of data exchange between
devices. The I2C standard is a true multi‐master bus including collision detection and arbitration that prevents data