Product Specs

PRELIMINARY PRODUCT SPECIFICATION
nRF24L01 Single Chip 2.4 GHz Radio Transceiver
Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway - Phone [phone] - Fax [phone]
Page 24 of 38
Revision: 1.1
November 2005
Address
(Hex)
Mnemonic
Bit
Reset
Value
Type
Description
0 Not Legal
1 = 1 byte
…
32 = 32 bytes
14
RX_PW_P3
Reserved
7:6
00
R/W
Only '00' allowed
RX_PW_P3
5:0
0
R/W
Number of bytes in RX payload in data
pipe 3 (1 to 32 bytes).
0 Not Legal
1 = 1 byte
…
32 = 32 bytes
15
RX_PW_P4
Reserved
7:6
00
R/W
Only '00' allowed
RX_PW_P4
5:0
0
R/W
Number of bytes in RX payload in data
pipe 4 (1 to 32 bytes).
0 Not Legal
1 = 1 byte
…
32 = 32 bytes
16
RX_PW_P5
Reserved
7:6
00
R/W
Only '00' allowed
RX_PW_P5
5:0
0
R/W
Number of bytes in RX payload in data
pipe 5 (1 to 32 bytes).
0 Not Legal
1 = 1 byte
…
32 = 32 bytes
17
FIFO_STATUS
FIFO Status Register
Reserved
7
0
R/W
Only '0' allowed
TX_REUSE
6
0
R
Reuse last sent data packet if set high.
The packet will be repeatedly resent as
long as CE is high.
TX_REUSE is set by the SPI instruction
REUSE_TX_PL, and is reset by the SPI
instructions W_TX_PAYLOAD or
FLUSH TX
TX_FULL
5
0
R
TX FIFO full flag. 1: TX FIFO full. 0:
Available locations in TX FIFO.
TX_EMPTY
4
1
R
TX FIFO empty flag. 1: TX FIFO empty.
0: Data in TX FIFO.
Reserved
3:2
00
R/W
Only '00' allowed
RX_FULL
1
0
R
RX FIFO full flag. 1: RX FIFO full. 0:
Available locations in RX FIFO.
RX_EMPTY
0
1
R
RX FIFO full flag. 1: RX FIFO empty. 0:
Data in RX FIFO.
N/A
TX_PLD
255:0
X
W
Written by separate SPI command TX
data payload register 1 - 32 bytes.
This register is implemented as a FIFO
with 3 levels.
Used in TX mode only
N/A
RX_PLD
255:0
X
R
Written by separate SPI command
RX data payload register. 1 - 32 bytes.
This register is implemented as a FIFO
with 3 levels.
All receive channels share the same FIFO
Table 11 Memory map of nRF24L01