Specifications

Ra-01SH Specification V1.1
Copyright © 2020 Shenzhen Ai-Thinker Technology Co., Ltd All Rights Reserved
第 12 页 共 17 页
The 3 general-purpose IO pins of SX1262 are available in LoRa™ mode.
Their mapping relationship depends on the configuration of the two registers
RegDioMapping1 and RegDioMapping2.
operating
mode
DIOx
Mapping
DIO
3
DIO2
DIO1
All
00
Cad
Don
e
Fhss
Change
Channel
RxRime
out
01
Valid
Hea
der
Fhss
Change
Channel
Fhss
Change
Channel
10
Payl
oad
Crc
Error
Fhss
Change
Channel
CadDete
cted
11
-
-
-
5. SCHEMATIC DIAGRAM