Programming instructions

CMOS
Multisim Component Reference Guide 7-28 ni.com
7.2.58 4075 (Tri 3-In OR)
This device contains three independent 3-input OR gates.
Logic function:
OR gate truth table:
7.2.59 4076 (Quad D-type Reg w/3-state Out)
D-type register truth table:
Y= A+B+C
ABCY
0000
0011
0101
0111
1001
1011
1101
1111
The 4076 device is a quadruple edge-triggered D-type flip-flop with four data inputs (D
0
to
D
3
), two active LOW data enable inputs (ED
0
and (ED
1
), a common clock input (CP), four
3-state outputs (O
0
to O
3
), two active LOW output enable inputs (EO
0
and EO
1
), and an
overriding asynchronous master reset input (MR).
INPUTS OUTPUTS
MR CP ED0 ED1 Dn On
1XXXX 0
0 · 1 X X NO CHANGE
0 · X 1 X NO CHANGE
0 ·001 1
0 ·000 0
0 ‚ X X X NO CHANGE
ComponentRef.book Page 28 Thursday, December 7, 2006 10:12 AM