Programming instructions

4000 Series ICs
 National Instruments Corporation 7-9 Multisim Component Reference Guide
7.2.14 40161 (4-bit Bin Counter)
7.2.15 40162 (4-bit Dec Counter)
7.2.16 40163 (4-bit Bin Counter)
7.2.17 4017 (5-stage Johnson Counter)
The 40161 device is a fully synchronous edge-triggered 4-bit binary counter with a clock
input (CP), an overriding asynchronous master reset (MR
), four parallel data inputs (P0 to
P3), three synchronous mode control inputs (parallel enable (PE
), count enable parallel
(CEP) and count enable trickle (CET)), buffered outputs from all four bit positions (O0 to
O3) and a terminal count output (TC).
The 40162 device is a fully synchronous edge-triggered 4-bit decade counter with a clock
input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode
control inputs (parallel enable (PE
), count enable parallel (CEP) and count enable trickle
(CET)), and synchronous reset (SR
)), buffered outputs from all four bit positions (O0 to
O3) and a terminal count output (TC).
The 40163 device is a fully synchronous edge-triggered 4-bit binary counter with a clock
input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode
control inputs (parallel enable (PE
), count enable parallel (CEP) and count enable trickle
(CET)), and synchronous reset (SR
)), buffered outputs from all four bit positions (O0 to
O3) and a terminal count output (TC).
The 4017 device is a 5-stage Johnson decade counter with ten spike-free decoded active
HIGH outputs (O
0
to O
9
), an active LOW output from the most significant flip-flop (O
5-9
),
active HIGH and active LOW clock inputs (CP
0
, CP
1
) and an overriding asynchronous
master reset input (MR).
ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM