Programming instructions

CMOS
Multisim Component Reference Guide 7-6 ni.com
NAND gate truth table:
7.2.10 4013 (Dual D-type FF (+edge))
D-type positive edge-triggered flip-flop truth table:
7.2.11 4014 (8-bit Static Shift Reg)
The 4014 device is a fully synchronous edge-triggered 8-bit static shift register with eight
synchronous parallel inputs (P
0
to P
7
), a synchronous serial data input (D
S
), a synchronous
parallel enable input (PE), a LOW to HIGH edge-triggered clock input (CP) and buffered
parallel outputs from the last three stages (O
5
to O
7
).
Following are two 8-bit static shift register truth tables.
INPUTS OUTPUTS
I1 I2 I3 I4 O1
1111 0
0XXX 1
X0XX 1
XX0X 1
XXX0 1
The 4013 device is a dual D-type flip-flop that features independent set direct (S
D
), clear
direct (C
D
), clock inputs (CP) and outputs (O,O).
SD CD CP D O O
10XX10
01XX01
11XX11
00 ·001
00 ·110
· = positive edge-triggered
ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM