Programming instructions

74xx
National Instruments Corporation 6-37 Multisim Component Reference Guide
6.4.66 74xx194 (4-bit Bidirect Univ. Shift Reg)
This bidirectional shift register has parallel-inputs, parallel outputs, right-shift and left-shift
serial inputs, operating-mode-control inputs, and a direct overriding clear line.
Shift register truth table:
6.4.67 74xx195 (4-bit Parallel-Access Shift Reg)
This 4-bit register has parallel inputs, parallel outputs, J-K serial inputs, shift/load control
input, and a direct overriding clear.
· = transition from low to high
a, b, c, d = the level of steady state input at inputs A, B, C, or D respectively
QA0, QB0, QC0,
QD0
= the level of QA, QB, QC, or QD, respectively, before the indicated steady state
input conditions were established
QAn, QBn, QCn,
QDn
= the level of QA, QB, QC, or QD before the most recent negative transition of
the clock
MODE SERIAL PARALLEL OUTPUTS
CLEAR
S1S0CLKLEFTRIGHTABCDQAQBQCQD
0 XXXX X XXXX0000
1 XX0 X X XXXXQA0QB0QC0QD0
1 11· X X abcdabcd
1 0 1 · X 1 XXXX1QAnQBnQCn
1 0 1 · X 0 XXXX0QAnQBnQCn
1 1 0 · 1 X XXXXQBnQCnQDn1
1 1 0 · 0 X XXXXQBnQCnQDn0
1 0 0 XX X XXXXQA0QB0QC0QD0
ComponentRef.book Page 37 Thursday, December 7, 2006 10:12 AM