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Multisim™

Component Reference Guide

January 2007

374485A-01

ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM

Summary of content (449 pages)

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ComponentRef.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Worldwide Technical Support and Product Information ni.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Important Information Warranty The media on which you receive National Instruments software are warranted not to fail to execute programming instructions, due to defects in materials and workmanship, for a period of 90 days from date of shipment, as evidenced by receipts or other documentation.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Documentation Conventions When Multisim guides refer to a toolbar button, an image of the button appears in the left column. Multisim guides use the convention Menu/Item to indicate menu commands. For example, “File/Open” means choose the Open command from the File menu. Multisim guides use the convention of an arrow ( ) to indicate the start of procedural information.
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ComponentRef.book Page i Thursday, December 7, 2006 10:12 AM Table of Contents 1. Source Components 1.1 Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.2 Digital Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 DC Voltage Source (Battery) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.
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ComponentRef.book Page ii Thursday, December 7, 2006 10:12 AM 1.20 Piecewise Linear Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 1.20.1 PWL Source Input Text File Specification. . . . . . . . . . . . . . . . . . . . . . . . . . 1-16 1.20.2 Piecewise Linear Voltage Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-17 1.20.3 Piecewise Linear Current Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-17 1.
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ComponentRef.book Page iii Thursday, December 7, 2006 10:12 AM 1.42 Thermal Noise Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-47 1.43 TDM Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-47 1.44 LVM Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-48 1.45 ABM Sources . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page iv Thursday, December 7, 2006 10:12 AM 2.6 Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18 2.6.1 About Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19 2.6.2 Characteristic Equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19 2.6.3 Changing a Placed Resistor’s Value. . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page v Thursday, December 7, 2006 10:12 AM 2.21 Magnetic Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-39 2.22 Coreless Coil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-40 2.22.1 Characteristic Equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-41 2.22.2 Coreless Coil Parameters and Defaults . . . . . . . . . . . . . . .
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ComponentRef.book Page vi Thursday, December 7, 2006 10:12 AM 3.8 Silicon-Controlled Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 3.8.1 Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 3.8.2 Time-Domain Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 3.8.3 AC Small-Signal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page vii Thursday, December 7, 2006 10:12 AM 4.7.5 4.7.6 AC Small-Signal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14 MOSFET Level 1 Model Parameters and Defaults . . . . . . . . . . . . . . . . . . 4-14 4.8 MOSFET Thermal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16 4.9 JFETs (Junction FETs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page viii Thursday, December 7, 2006 10:12 AM 6. TTL 6.1 Standard TTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 6.2 Schottky TTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 6.3 Low-Power Schottky TTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6.4 74xx . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page ix Thursday, December 7, 2006 10:12 AM 6.4.35 6.4.36 6.4.37 6.4.38 6.4.39 6.4.40 6.4.41 6.4.42 6.4.43 6.4.44 6.4.45 6.4.46 6.4.47 6.4.48 6.4.49 6.4.50 6.4.51 6.4.52 6.4.53 6.4.54 6.4.55 6.4.56 6.4.57 6.4.58 6.4.59 6.4.60 6.4.61 6.4.62 6.4.63 6.4.64 6.4.65 6.4.66 6.4.67 6.4.68 6.4.69 6.4.70 6.4.71 6.4.72 6.4.73 6.4.74 6.4.75 6.4.76 74xx15 (3 3-Input AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74xx150 (1-of-16 Data Sel/MUX) . . . . . . . . . . .
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ComponentRef.book Page x Thursday, December 7, 2006 10:12 AM 6.4.77 6.4.78 6.4.79 6.4.80 6.4.81 6.4.82 6.4.83 6.4.84 6.4.85 6.4.86 6.4.87 6.4.88 6.4.89 6.4.90 6.4.91 6.4.92 6.4.93 6.4.94 6.4.95 6.4.96 6.4.97 6.4.98 6.4.99 6.4.100 6.4.101 6.4.102 6.4.103 6.4.104 6.4.105 6.4.106 6.4.107 6.4.108 6.4.109 6.4.110 6.4.111 6.4.112 6.4.113 6.4.114 6.4.115 6.4.116 6.4.117 6.4.118 74xx244 (Octal BUFFER w/3-state Out) . . . . . . . . . . . . . . . . . . . . . . . . . . 6-42 74xx246 (BCD-to-seven segment dec) . . . .
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ComponentRef.book Page xi Thursday, December 7, 2006 10:12 AM 6.4.119 6.4.120 6.4.121 6.4.122 6.4.123 6.4.124 6.4.125 6.4.126 6.4.127 6.4.128 6.4.129 6.4.130 6.4.131 6.4.132 6.4.133 6.4.134 6.4.135 6.4.136 6.4.137 6.4.138 6.4.139 6.4.140 6.4.141 6.4.142 6.4.143 6.4.144 6.4.145 6.4.146 6.4.147 6.4.148 6.4.149 6.4.150 6.4.151 6.4.152 6.4.153 6.4.154 6.4.155 6.4.156 6.4.157 6.4.158 6.4.159 6.4.160 74xx390 (Dual Div-by-2, Div-by-5 Counter) . . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page xii Thursday, December 7, 2006 10:12 AM 6.4.161 6.4.162 6.4.163 6.4.164 6.4.165 74xx86 (Quad 2-In XOR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-92 74xx90 (Decade Counter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-93 74xx91 (8-bit Shift Reg) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-93 74xx92 (Divide-by-twelve Counter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page xiii Thursday, December 7, 2006 10:12 AM 7.2.28 7.2.29 7.2.30 7.2.31 7.2.32 7.2.33 7.2.34 7.2.35 7.2.36 7.2.37 7.2.38 7.2.39 7.2.40 7.2.41 7.2.42 7.2.43 7.2.44 7.2.45 7.2.46 7.2.47 7.2.48 7.2.49 7.2.50 7.2.51 7.2.52 7.2.53 7.2.54 7.2.55 7.2.56 7.2.57 7.2.58 7.2.59 7.2.60 7.2.61 7.2.62 7.2.63 7.2.64 7.2.65 7.2.66 7.2.67 7.2.68 7.2.69 4023 (Tri 3-In NAND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4024 (7-stage Binary Counter) . . . . . . . . . . .
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ComponentRef.book Page xiv Thursday, December 7, 2006 10:12 AM 7.2.70 7.2.71 7.2.72 7.2.73 7.2.74 7.2.75 7.2.76 7.2.77 7.2.78 7.2.79 7.2.80 7.2.81 7.2.82 7.2.83 7.2.84 7.2.85 7.2.86 7.2.87 7.2.88 7.2.89 7.2.90 7.3 4503 (Tri-state hex BUFFER w/Strobe) . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-35 4508 (Dual 4-bit latch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-36 4510 (BCD up/down Counter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page xv Thursday, December 7, 2006 10:12 AM 7.3.20 7.3.21 7.3.22 7.3.23 7.3.24 NC7SZ126 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NC7SZ32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NC7SZ38 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NC7SZ86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page xvi Thursday, December 7, 2006 10:12 AM 9.3 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11 9.4 Line Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11 9.5 Line Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11 9.6 Line Transceiver . . . . . . . . . . .
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ComponentRef.book Page xvii Thursday, December 7, 2006 10:12 AM 11. Indicators 11.1 Voltmeter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1 11.2 Ammeter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2 11.3 Digital Probe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2 11.4 Lamp . . . . . . . . . . . .
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ComponentRef.book Page xviii Thursday, December 7, 2006 10:12 AM 12.2.7 12.2.8 12.2.9 12.2.10 12.2.11 12.2.12 12.2.13 12.2.14 12.2.15 12.2.16 12.2.17 12.2.18 12.2.19 12.2.20 12.2.21 FLYBACKCCM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-21 BUCKDCM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-22 BUCKVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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ComponentRef.book Page xix Thursday, December 7, 2006 10:12 AM 13.4.3 Triode Vacuum Tube Parameters and Defaults . . . . . . . . . . . . . . . . . . . . . 13-6 13.5 Boost Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-6 13.5.1 Characteristic Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-7 13.5.2 Boost Converter Parameters and Defaults. . . . . . . . . . . . . . . . . . . . . . . . . 13-8 13.
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ComponentRef.book Page xx Thursday, December 7, 2006 10:12 AM 15. Electromechanical Components 15.1 Sensing Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-1 15.2 Supplementary Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-1 15.3 Momentary Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-2 15.4 Line Transformer . . . . . . . . .
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 1 Source Components 1.1 Ground A voltage measurement is always referenced to some point, since a voltage is actually a “potential difference” between two points in a circuit. The concept of “ground” is a way of defining a point common to all voltages. It represents 0 volts. All voltage levels around the circuit are positive or negative when compared to ground.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Source Components 1.2 Digital Ground The digital ground is used to ground digital components which do not have an explicit ground pin. The digital ground must be placed on the schematic but does not need to be connected directly to any component. Tip If you are unsure of the ground required for a digital component that has its ground pin hidden, double-click on the component and click on the Pins tab.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Digital Power Supplies A single cell has a voltage of approximately 1.5 volts, depending on its construction. It consists of a container of acid in which an electrode is placed. Chemical action causes electrons to flow between the electrode and the container, and this creates a potential difference between the electrode and the material of the container.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Source Components If you rename a digital power supply by changing its RefDes, and there are other instances of the same supply on the schematic, you will be prompted to confirm that you want to change all instances of the RefDes. If you select No, only the RefDes for the selected component will change. Remember that if a digital power supply’s RefDes is changed, the net name of any wires attached to it will change to match the new RefDes.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM AC Current Source 1.7 AC Current Source The RMS current of this source can be adjusted from microamps to kiloamps. You can also control its frequency and phase angle. IR MS = 1.8 I peak 2 Clock Source This component is a square wave generator. You can adjust its voltage amplitude, duty cycle and frequency. 1.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Source Components 1.9.1 Characteristic Equation The behavior of the AM source is described by: VOUT = vc∗ sin(2∗ π ∗ fc∗ TIME )∗ (1 + m∗ sin( 2∗ π ∗ fm∗ TIME )) where: vc = carrier amplitude, in volts fc = carrier frequency, in hertz m = modulation index fm = modulation frequency, in hertz 1.10 FM Source The FM source (single-frequency frequency modulation source) generates a frequencymodulated wave.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM FSK Source 1.10.3 FM Current Source This component is the same as the FM voltage source, except that the output is measured in current. 1.10.4 Characteristic Equation The behavior of the FM current source is described by the same equation as in the FM Voltage Source, with Vout replaced by Iout. 1.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Source Components When the keying input is 5V, a MARK frequency of 1200 Hz is output. When keying voltage is 0V, a SPACE frequency of 2200 Hz is output. This component is a square wave generator. You can adjust its voltage amplitude, duty cycle and frequency. 1.12 Voltage-Controlled Voltage Source The output voltage of this source depends on the voltage applied to its input terminal.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Current-Controlled Voltage Source 1.13 Current-Controlled Voltage Source The output voltage of this source depends on the current through the input terminals. The two are related by a parameter called transresistance (H), which is the ratio of the output voltage to the input current. It can have any value from mW to kW. H = 1.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Source Components which is the ratio of the output current to the input current. The current gain can have any value from mA/A to kA/A. F= 1.16 I OUT I IN Voltage-Controlled Sine Wave This oscillator takes an input AC or DC voltage, which it uses as the independent variable in the piecewise linear curve described by the (control, frequency) pairs.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM Voltage-Controlled Square Wave A square wave control voltage produces a form of FSK (frequency shift keying), a sine wave control voltage produces a form of FM (frequency modulation). 1.17 Voltage-Controlled Square Wave This oscillator is identical to the voltage-controlled sine wave oscillator except that it outputs a square wave.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Source Components Example The example shows a square wave generator with output frequency determined by a control voltage. Control voltage may be DC, controlled by a potentiometer, as is the case for many signal generators and function generators. Control voltage may be a continuous variable of any desired shape as required in sweep generators and spectrum analysers.
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM Voltage-Controlled Triangle Wave 1.18 Voltage-Controlled Triangle Wave This oscillator is identical to the voltage-controlled sine wave oscillator except that it outputs a triangle wave. This oscillator takes an input AC or DC voltage, which it uses as the independent variable in the piecewise linear curve described by the (control, frequency) pairs.
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM Source Components A square wave control voltage produces a form of FSK (frequency shift keying), a sine wave control voltage produces a form of FM (frequency modulation). 1.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM Piecewise Linear Source especially for large input values. Therefore, keep in mind that this source does not inherently provide a limiting capability. In order to reduce the potential for non-convergence of simulations, the source provides for smoothing around the co-ordinate pairs.
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ComponentRef.book Page 16 Thursday, December 7, 2006 10:12 AM Source Components 1.20.1 PWL Source Input Text File Specification This file must contain a list of time and voltage or current points. Each line of the file represents one point. The format is: Time Voltage or Time Current You can leave any amount of space between the Time and Voltage/Current fields. Here is an example of an ideally formatted input file: 0 0 2.88e-06 0.0181273 5.76e-06 0.0363142 1e-05 0.063185 1.
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ComponentRef.book Page 17 Thursday, December 7, 2006 10:12 AM Piecewise Linear Source 1.20.2 Piecewise Linear Voltage Source This component is a piecewise linear source with a voltage output. The Value tab in this component’s properties dialog box contains the following: The Use data directly from file radio button, used if your data pairs are in a separate .txt file. If you choose this option, the circuit will depend on the text file.
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ComponentRef.book Page 18 Thursday, December 7, 2006 10:12 AM Source Components file. If you choose this option, the circuit will depend on the text file. When this button is selected the following become active: • Filename — click on the button to the right of this field and navigate to the data file. The data file must have a .txt extension to be used. Note If you do not specify a filename, the output of the PWL current source behaves like an open circuit. An error message does not display in this case.
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ComponentRef.book Page 19 Thursday, December 7, 2006 10:12 AM Polynomial Source 1.21.1 Pulse Voltage Source This component is a pulse source of which the output is measured in voltage. 1.21.2 Pulse Current Source This component is the same as the Pulse Voltage Source, except that the output is measured in current. 1.22 Polynomial Source This is a voltage-controlled voltage source defined by a polynomial transfer function. It is a specific case of the more general nonlinear dependent source.
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ComponentRef.book Page 20 Thursday, December 7, 2006 10:12 AM Source Components where: A = constant B = coefficient of V1 C = coefficient of V2 D = coefficient of V3 E = coefficient of V1² F = coefficient of V1*V2 G = coefficient of V1*V3 H = coefficient of V2² I = coefficient of V2*V3 J = coefficient of V3² K = coefficient of V1*V2*V3 1.23 Exponential Source The exponential sources are configurable sources whose output can be set to produce an exponential signal.
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ComponentRef.book Page 21 Thursday, December 7, 2006 10:12 AM Nonlinear Dependent Source 1.23.2 Exponential Current Source This component is the same as the Exponential Voltage Source, except that the output is measured in current. 1.24 Nonlinear Dependent Source Use this source for analog behavioral modeling. This generic source allows you to create a sophisticated behavioral model by entering a mathematical expression. This source uses analog behavioral modeling through mathematical expressions.
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ComponentRef.book Page 22 Thursday, December 7, 2006 10:12 AM Source Components change clock trigger value, output delay from trigger, output delay from pulse width, output rise and fall times, and output high and low values. When only two co-ordinate pairs are used, the oscillator outputs a linear variation of the pulse with respect to the control input. When the number of co-ordinate pairs is greater than two, the output is piecewise linear. 1.
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ComponentRef.book Page 23 Thursday, December 7, 2006 10:12 AM Multiplier The Magnetic Channel field on the Hall Effect Sensor must have a matching integer value for that sensor to be influenced by the generator. No two magnetic flux generators or sources should have the same integer value in the Magnetic Channel field.
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ComponentRef.book Page 24 Thursday, December 7, 2006 10:12 AM Source Components Characteristic Equation The output voltage is given by: ( ( ) ( Vout = K X K Vx + X off ∗ Yk Vy + Yoff ) ) + off where: Vx = input voltage at x Vy = input voltage at y Other symbols used in these equations are defined in “Multiplier Parameters and Defaults”. Multisim Component Reference Guide 1-24 ni.
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ComponentRef.book Page 25 Thursday, December 7, 2006 10:12 AM Divider Multiplier Parameters and Defaults 1.29 Symbol Parameter Name Default Unit k Output gain 0.1 V/V off Output 0.0 V Yoff Y offset 0.0 V Yk Y gain 1.0 V/V Xoff X offset 0.0 V Xk X gain 1.0 V/V Divider This component divides one voltage (the y input, or numerator) by another (the x input, or denominator).
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ComponentRef.book Page 26 Thursday, December 7, 2006 10:12 AM Source Components CAUTION If the X (denominator) voltage crosses 0v when any voltage is present at the Y (numerator) terminal, the quotient will go to infinity and a large positive or negative “spike” will be observed on the scope.
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ComponentRef.book Page 27 Thursday, December 7, 2006 10:12 AM Transfer Function Block Divider Parameters and Defaults 1.
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ComponentRef.book Page 28 Thursday, December 7, 2006 10:12 AM Source Components In the example shown below, the transfer function for a simple first order low pass filter is used. Only the numerator and denominator constants A0 and B0 are required in this case. These are equal to two pi times the cutoff frequency (first pole). The cursor on the Bode Plotter may be used to confirm first order performance with -3dB at 10kHz. and rolloff of 6dB per octave above 20kHz.
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ComponentRef.book Page 29 Thursday, December 7, 2006 10:12 AM Voltage Gain Block 1.31 Symbol Parameter Name Default Unit B3 Denominator 3rd order coefficient 0 - B2 Denominator 2nd order coefficient 0 - B1 Denominator 1st order coefficient 0 - B0 Denominator constant 1 - Voltage Gain Block This component multiplies the input voltage by the gain and delivers it to the output.
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ComponentRef.book Page 30 Thursday, December 7, 2006 10:12 AM Source Components Suitable settings of model parameters will allow for virtually unlimited flexibility for practical applications. Characteristic Equation Vout = K (Vin + VIoff ) + VOoff Voltage Gain Block Parameters and Defaults Symbol Parameter Name Default Unit K Gain 1 V/V VIoff Input offset voltage 0 V VOoff Output offset voltage 0 V Multisim Component Reference Guide 1-30 ni.
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ComponentRef.book Page 31 Thursday, December 7, 2006 10:12 AM Voltage Differentiator 1.32 Voltage Differentiator This component calculates the derivative of the input voltage (the transfer function, s) and delivers it to the output. It is used in control systems and analog computing applications. Differentiation may be described as a “rate of change” function and defines the slope of a curve.
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ComponentRef.book Page 32 Thursday, December 7, 2006 10:12 AM Source Components 1.32.1 Investigations Sine wave The slope of a sine wave changes continuously and smoothly. Therefore, the differentiator output should follow the sine shape. In the example circuit shown below, if you change frequency from 10Hz. to 100Hz., the rate of change of the waveform will increase by a factor of 10. The differentiator output will also increase by the same factor.
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ComponentRef.book Page 33 Thursday, December 7, 2006 10:12 AM Voltage Integrator Changing the RC time constant and comparing differentiator output will illustrate this point. 1.33 Voltage Integrator This component calculates the integral of the input voltage (the transfer function, 1/s) and delivers it to the output. It is used in control systems and analog computing applications. The true integrator function continuously adds the area under a curve for a specified time interval.
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ComponentRef.book Page 34 Thursday, December 7, 2006 10:12 AM Source Components Characteristic Equation t ( ) Vout (t ) = K ∫ Vi (t ) + VIoff dt + VOic 0 Voltage Integrator Parameters and Defaults Symbol Parameter Name Default Unit VIoff Input offset voltage 0 V K Gain 1 V/V Vl Output voltage lower limit -1e+12 V Vu Output voltage upper limit 1e+12 V Vs Upper and lower smoothing range 1e-06 V VOic Output initial conditions 0 V 1.33.1 Investigations 1.
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ComponentRef.book Page 35 Thursday, December 7, 2006 10:12 AM Voltage Hysteresis Block Changing frequency changes the area. Therefore, in the case of lower frequencies, output rises faster. 1.34 Voltage Hysteresis Block This component is a simple buffer stage that provides hysteresis of the output with respect to the input. ViL and ViH specify the center voltage or current inputs about which the hysteresis effect operates. The output values are limited to VoL and VoH.
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ComponentRef.book Page 36 Thursday, December 7, 2006 10:12 AM Source Components As shown, the input triangle waveform rises from 0V and the output is at its lowest value (0V in this case), as the input crosses +5V (the upper threshold in comparator terms) the output changes to its highest value(+2V in this case). Internally in the hysteresis block the threshold is now changed to -5V, (the lower threshold). The output continues to rise to a peak and then starts to decrease.
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ComponentRef.book Page 37 Thursday, December 7, 2006 10:12 AM Voltage Limiter 1.35 Voltage Limiter This is a voltage “clipper”. The output voltage excursions are limited, or clipped, at predetermined upper and lower voltage levels while input-signal amplitude varies widely. In the example shown below, the upper voltage limit is set to +5V and the lower limit is set to - 5 volts.
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ComponentRef.book Page 38 Thursday, December 7, 2006 10:12 AM Source Components Characteristic Equation VOUT = K (Vin + VIoff ) for Vmin ≤ Vout ≤ Vmax VOUT = Vmax VOUT = Vmin VOUT > Vmax for VOUT < Vmin for Voltage Limiter Parameters and Defaults 1.
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ComponentRef.book Page 39 Thursday, December 7, 2006 10:12 AM Current Limiter Block specified by either ISrcL or ISnkL. The latter mimics the current limiting behavior of many operational amplifier output stages. During operation, the output current is reflected either in the positive or the negative power supply inputs, depending on the polarity of the output current. Thus, realistic power consumption as seen in the supply rails is modeled.
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ComponentRef.book Page 40 Thursday, December 7, 2006 10:12 AM Source Components A sine wave input of 1.4v RMS or less will be passed undistorted through the “amplifier” while inputs greater than 1.4 v RMS will show limiting (clipping) at the peaks.
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ComponentRef.book Page 41 Thursday, December 7, 2006 10:12 AM Voltage-Controlled Limiter 1.37 Voltage-Controlled Limiter A voltage “clipper”. This component is a single input, single output function. The output is restricted to the range specified by the output lower and upper limits. Output smoothing occurs within the specified range. The voltage-controlled limiter will operate in DC, AC and transient analysis modes.
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ComponentRef.book Page 42 Thursday, December 7, 2006 10:12 AM Source Components These settings may be adjusted to provide symmetrical or unsymmetrical clipping on the positive and negative peak excursions of the input waveform when these peaks exceed the set limit (clipping) values.
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ComponentRef.book Page 43 Thursday, December 7, 2006 10:12 AM Voltage Slew Rate Block 1.38 Voltage Slew Rate Block This component limits the absolute slope of the output, with respect to time, to some maximum or value. You can accurately model actual slew rate effects of over-driving an amplifier circuit by cascading the amplifier with this component. Maximum rising and falling slope values are expressed in volts per second.
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ComponentRef.book Page 44 Thursday, December 7, 2006 10:12 AM Source Components A more serious degradation of output as a result of slew rate occurs when the input frequency is doubled to 200Hz. Voltage Slew Rate Block Parameters and Defaults 1.
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ComponentRef.book Page 45 Thursday, December 7, 2006 10:12 AM Three-Way Voltage Summer The summer may be used to illustrate the result of adding harmonically related sine wave components which make up a complex waveform (the first three terms in the Fourier expression defining the waveform). In the example, a fundamental frequency of 60 Hz. and the third and fifth harmonics (in phase) may be progressively added to illustrate the basic makeup of a square wave.
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ComponentRef.book Page 46 Thursday, December 7, 2006 10:12 AM Source Components Summer Parameters and Defaults 1.40 Symbol Parameter Name Default Unit VAoff Input A offset voltage 0 V VBoff Input B offset voltage 0 V VCoff Input C offset voltage 0 V Ka Input A gain 1 V/V Kb Input B gain 1 V/V Kc Input C gain 1 V/V Kout Output gain 1 V/V VOoff Output offset voltage 0 V Three Phase Delta This component provides a 3 phase power source.
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ComponentRef.book Page 47 Thursday, December 7, 2006 10:12 AM Thermal Noise Source 1.42 Thermal Noise Source The Thermal Noise Source uses a Gaussian White Noise model to simulate thermal noise (also known as Johnson noise) in a conductor. It can be placed in series with a resistor to emulate the thermal noise generated by that resistor. Thermal Noise results from charges bound to thermally vibrating molecules, which produce EMF (electro-motive force) at the open terminals of a conductor.
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ComponentRef.book Page 48 Thursday, December 7, 2006 10:12 AM Source Components Note If you do not specify a filename, the component behaves like an open circuit. An error message does not display in this case. • Preview Data — select to view the file’s contents in the Value tab. • Reload File — click to reload the file when the .tdm file has been edited and you wish to reflect the changes in the TDM Source. • Repeat — enable to continuously run the file during simulation.
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ComponentRef.book Page 49 Thursday, December 7, 2006 10:12 AM ABM Sources Channel data, or click OK to accept the default settings. • Preview Data — select to view the file’s contents in the Value tab. • Reload File — click to reload the file when the .lvm file has been edited and you wish to reflect the changes in the LVM Source. • Repeat — enable to continuously run the file during simulation. If this checkbox is not enabled, output from the source will cease once the final data pair has been read. 3.
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ComponentRef.book Page 50 Thursday, December 7, 2006 10:12 AM Source Components Expressions may use reference branch currents through voltage source elements using the syntax I(), where is a single letter specifying a the type of SPICE primitive source and is the schematic reference designator of the voltage source.
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ComponentRef.book Page 51 Thursday, December 7, 2006 10:12 AM Bipolar Sources The example below is an ABM voltage source whose expression references current through three different types of voltage source components. Referenced current Note Positive current polarity is taken from the positive node to the negative node of the voltage source. Multisim supports a rich set of operators and functions which can be used in expressions.
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ComponentRef.book Page 52 Thursday, December 7, 2006 10:12 AM Source Components 1.47 GAIN_2_PIN This device is a voltage-controlled voltage source. To edit this device’s parameters: 1. Double-click on the placed component and select the Value tab. 2. Change the Voltage Gain as desired. Multisim Component Reference Guide 1-52 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 2 Basic Components 2.1 Connectors Connectors are mechanical devices used to provide a method of inputting and outputting signals to a design. They do not affect the simulation of the circuit but are included in the circuit for the design of the PCB. 2.2 Rated Virtual Components This component family contains a number of virtual components that can be rated to “blow” if pre-set tolerance(s) are exceeded when the circuit is simulated.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Basic Components 2.2.1 Rated 555 Timer The 555 timer is an IC chip that is commonly used as an astable multivibrator, a monostable multivibrator or a voltage-controlled oscillator. The 555 timer consists basically of two comparators, a resistive voltage divider, a flip-flop and a discharge transistor. It is a two-state device whose output voltage level can be either high or low.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Rated Virtual Components 2.2.2 Rated BJTs A bipolar junction transistor, or BJT, is a current-based valve used for controlling electronic current. BJTs are operated in three different modes, depending on which element is common to input and output: common base, common emitter or common collector. The three modes have different input and output impedances and different current gains, offering individual advantages to a designer.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Basic Components 2.2.3 Rated Capacitors A capacitor stores electrical energy in the form of an electrostatic field. Capacitors are widely used to filter or remove AC signals from a variety of circuits. In a DC circuit, they can be used to block the flow of direct current while allowing AC signals to pass. A capacitor’s capacity to store energy is called its capacitance, C, which is measured in farads.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM Rated Virtual Components To adjust the component’s tolerances: 1. Double-click on the placed component and click the Value tab. 2. Change the following values as desired: • Animation Delay Factor — increase this number to slow the speed of animation of the symbol blowing. This is not a real-time value. • Reverse Breakdown Voltage — set as desired. • Current at Breakdown Voltage — set as desired.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Basic Components 2.2.6 Rated Inductors An inductor stores energy in an electromagnetic field created by changes in current through it. Its ability to oppose a change in current flow is called inductance, L, and is measured in Henrys. Note Refer to the Component Reference Guide for a more detailed discussion of inductors. To adjust the component’s tolerances: 1. Double-click on the placed component and click the Value tab. 2.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM Rated Virtual Components 2. Change the following values as desired: • Animation Delay Factor — increase this number to slow the speed of animation of the symbol blowing. This is not a real-time value. • On Current (Ion) — the current required to switch the LED on. • Reverse Breakdown Voltage — set as desired. • Maximum Rated Power (Watts) — the maximum power dissipation across the LED allowed.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Basic Components Tip To view the following fields, click in a blank space in the Value tab and drag the mouse upward. • Shaft Friction (Bf) — set as desired. • Rotational Inertia (J) — set as desired. • Rated Rotational Speed (NN) — set as desired. • Load Torque (Tl) — set as desired. 3. Click OK. 2.2.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Rated Virtual Components 2.2.10 Rated Opamp An ideal operational amplifier (Opamp) is an amplifier with infinite gain, infinite input impedance and zero output impedance. With the application of negative feedback, Opamps can be used to implement functions such as addition, subtraction, differentiation, integration, averaging and amplification.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Basic Components 2.2.11 Rated Photodiode The photodiode emits a source of infrared light which is detected by the phototransistor. These devices are intended to be used in pairs. You must specify a light channel in each of these paired parts (photodiode and phototransistor). This is done in the Value tab of the component’s properties screen.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM Rated Virtual Components You must specify a light channel in each of these paired parts (photodiode and phototransistor). This is done in the Value tab of the component’s properties screen. Each diode must have a different value for its light channel, however, the phototransistor can share the same value with several other phototransistors. To adjust the component’s tolerances: 1. Double-click on the placed component and click the Value tab.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Basic Components • Resistance — the maximum resistance of the potentiometer. • Maximum Rated Power (Watts) — If this value is exceeded during simulation, the potentiometer blows. 3. Click OK. 2.2.14 Rated Pullup This component is used to raise the voltage of a circuit to which it is connected. One end is connected to Vcc. The other end is connected to a point in a logic circuit that needs to be raised to a voltage level closer to Vcc.
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM Rated Virtual Components To adjust the component’s tolerances: 1. Double-click on the placed component and click the Value tab. 2. Change the following values as desired: • Animation Delay Factor — increase this number to slow the speed of animation of the symbol blowing. This is not a real-time value. • Resistance — set as desired. • Maximum Rated Power (Watts) — If this value is exceeded during simulation, the resistor blows.
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM Basic Components resistor blows. • Maximum Secondary 1 Current — If this value is exceeded during simulation, the resistor blows. • Maximum Secondary 2 Voltage — If this value is exceeded during simulation, the resistor blows. • Maximum Secondary 2 Current — If this value is exceeded during simulation, the resistor blows. • Maximum Output Power (kVA) — If this value is exceeded during simulation, the resistor blows.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM Rated Virtual Components symbol blowing. This is not a real-time value. • Capacitance — the maximum capacitance of the variable capacitor. • Initial Conditions — the charge across the capacitor that is present before simulation starts. • Voltage Rating (Pk) — If this value is exceeded during simulation, the capacitor blows. 3. Click OK. 2.2.
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ComponentRef.book Page 16 Thursday, December 7, 2006 10:12 AM Basic Components 2.2.19 Rated Virtual Components Toolbar Some of the more commonly-used rated virtual components can be placed using the Rated Virtual Components toolbar. To display the Rated Virtual Components toolbar, click the Show Rated Family button in the Virtual toolbar (refer to the Multisim User Guide for Virtual toolbar information).
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ComponentRef.book Page 17 Thursday, December 7, 2006 10:12 AM Switch To specify the key that controls the switch: 1. Double-click on the switch and select its Value tab. 2. Select the key in the Key for Switch drop-down list and click OK. To toggle the switch on or off using the keyboard, press the identified key. To toggle the switch on or off using the mouse, hover the cursor over the switch’s arm and click when the arm takes on a thickened appearance.
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ComponentRef.book Page 18 Thursday, December 7, 2006 10:12 AM Basic Components 2.5 SBREAK This device is a voltage-controlled switch. To change the component’s parameters: 1. Double-click on the placed component and select the Value tab. 2. Change the following as desired: • On-state Voltage (VON) — voltage at which the switch turns on. • Off-state Voltage (VOFF) — voltage at which the switch turns off. • On-state Resistance (RON) — resistance of the device during its on-state.
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ComponentRef.book Page 19 Thursday, December 7, 2006 10:12 AM Resistor TC2 = Second order temperature coefficient T = Temperature of the resistor 2.6.1 About Resistance Ohm's law states that current flow depends on circuit resistance: I = E/R Circuit resistance can be calculated from the current flow and the voltage: R = E/I Circuit resistance can be increased by connecting resistors in series: R = R1 + R2 +...+ Rn Circuit resistance can be reduced by placing one resistor in parallel with another. 2.6.
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ComponentRef.book Page 20 Thursday, December 7, 2006 10:12 AM Basic Components 4. Optionally, enter information in the Component Type (for example, carbon film) and Hyperlink fields. 5. Optionally, enable the Additional SPICE Simulation Parameters fields described below: • • • • Temperature (TEMP) — the device’s operating temperature. Temperature Coefficient (TC1) — first order temperature coefficient. Temperature Coefficient (TC2) — second order temperature coefficient.
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ComponentRef.book Page 21 Thursday, December 7, 2006 10:12 AM Capacitor 2.7.1 Characteristic Equation The current through the capacitor is equal to C multiplied by the rate of change in voltage across the capacitor, that is: i=C 2.7.2 dv dt DC Model In the DC model, the capacitor is represented by an open circuit. 2.7.3 Time-Domain Model Rcn is an equivalent resistance and icn is an equivalent current source. The expression for the Rcn and icn depends on the numerical integration method used.
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ComponentRef.book Page 22 Thursday, December 7, 2006 10:12 AM Basic Components These expressions are derived by applying appropriate numerical integration to the characteristic equation of the capacitor. 2.7.4 AC Frequency Model For the small-signal analysis, the capacitor is modeled by an impedance whose imaginary component is equal to: 1 2πfC where: f = frequency of operation C = capacitance value 2.7.
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ComponentRef.book Page 23 Thursday, December 7, 2006 10:12 AM Inductor 2.8 Inductor An inductor stores energy in an electromagnetic field created by changes in current through it. Its ability to oppose a change in current flow is called inductance, L, and is measured in Henrys. An inductor is a coil of wire of one “turn” or more.
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ComponentRef.book Page 24 Thursday, December 7, 2006 10:12 AM Basic Components For trapezoid method: 2L h h iLn = Vn + in 2L RLn = For Gear method (first order): RLn = iLn = L h h Vn L where: Vn+1 = present unknown voltage across the inductor in+1 = present unknown current through the inductor Vn, in = previous solution values h = time step n = time interval These expressions are derived by applying appropriate numerical integration to the characteristic equation of the inductor. 2.8.
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ComponentRef.book Page 25 Thursday, December 7, 2006 10:12 AM Advanced Inductor 2.8.5 Changing a Placed Inductor’s Value To change the value, and other parameters of a placed inductor: 1. Double-click on the inductor and select the Value tab. 2. Select the desired inductance from the Inductance(L) list. If it is not there, type the value you want. 3. Select the desired tolerance from the Tolerance list, or type in a value. 4.
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ComponentRef.book Page 26 Thursday, December 7, 2006 10:12 AM Basic Components Advanced Inductor Model Overview The advanced inductor model includes both non-ideal AC and DC effects. The simplified subcircuit for the inductor has the following model: The actual inductor model includes a dependent voltage source that is proportional to the derivative of the current, IL. See “Advanced Inductor Model Implementation” on page 2-28 for a more detailed implementation overview.
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ComponentRef.book Page 27 Thursday, December 7, 2006 10:12 AM Advanced Inductor The inductor quality factor is also available in datasheets and is entered in the Inductor Quality Factor field. DC The DC aspect of the model includes a series DC resistance, and a non-linear inductor whose inductance varies with current. The DC resistance is the winding material resistance and is specified on the datasheet. It is entered in the Inductor Series Resistance field.
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ComponentRef.book Page 28 Thursday, December 7, 2006 10:12 AM Basic Components 2.9.1 Advanced Inductor Model Implementation The schematic version of the advanced inductor SPICE model is shown below. Nodes 1 and 2 are the inductor's terminals. Bmain 3 4 V={if(abs(i(v1)) < 3*Idc , +Lo*(1-0.1/(Idc^2)*i(v1)^2)* i(v_di_dt), Lo*0.
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ComponentRef.book Page 29 Thursday, December 7, 2006 10:12 AM Transformer Within the Bmain expression, the segment Lo*(1-0.1/(Idc^2)*i(v1)^2)* v_di_dt is exactly the inductor equation we desire: The if-statement switches between the non-linear inductor model and the constant linear inductor model when the inductance falls to 10% of nominal value (or current has reached 3*Idc). References [1] Martin O’Hara, “Modeling Non-Ideal Inductors in SPICE, Martin O’Hara,” EETimes Asia, April 2002 2.
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ComponentRef.book Page 30 Thursday, December 7, 2006 10:12 AM Basic Components where: V1 = primary voltage V2 = secondary voltage n = turns ratio i = primary current i = secondary current 1 2 2.10.2 Ideal Transformer Model Parameters and Defaults Symbol Parameter Name Default Unit n Turns ratio 2 - Le Leakage inductance 0.001 H Lm Magnetizing inductance 5 H Rp Primary winding resistance 0.0 W Rs Secondary winding resistance 0.
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ComponentRef.book Page 31 Thursday, December 7, 2006 10:12 AM Nonlinear Transformer 2.11.1 Customizing The nonlinear transformer can be customized for different applications. It is implemented by using a magnetic core and the coreless coil as the basic building blocks. The magnetic core takes in an input voltage and converts it to a Magnetomotive Force (mmf).
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ComponentRef.book Page 32 Thursday, December 7, 2006 10:12 AM Basic Components 2.12 Symbol Parameter Name Default Unit A Cross-sectional area 1.0 m2 L Core length 1.0 m ISD Input smoothing domain 1.0% - N Number of co-ordinates H1 Magnetic field co-ordinate 1 0 A*turns/m H2 Magnetic field co-ordinate2 1.0 A*turns/m H3-H15 Magnetic field co-ordinates 0 A*turns/m B1 Flux density co-ordinate 1 0 Wb/m2 B2 Flux density co-ordinate 2 1.
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ComponentRef.book Page 33 Thursday, December 7, 2006 10:12 AM Variable Capacitor 2.12.1 Model The energizing coil of the relay is modeled as an inductor, and the relay’s switching contact is modeled as resistors R1 and R2. 2.12.
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ComponentRef.book Page 34 Thursday, December 7, 2006 10:12 AM Basic Components 4. Enter the percentage by which you want the variable capacitor to change in the Increment field. 5. Optionally, enter Component Type and Hyperlink information. 6. Optionally, change the Layout Settings as described below: • Edit Footprint button — click to display the Edit Footprint dialog box where you can select a new Footprint and Manufacturer.
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ComponentRef.book Page 35 Thursday, December 7, 2006 10:12 AM Variable Inductor 2.14 Variable Inductor The variable inductor acts much like a regular inductor, except that you can adjust its value using the keyboard or by hovering the cursor over the device and moving the slider bar that appears. To set up the variable inductor: 1. Double-click on the variable inductor and select the Value tab. 2. Enter the desired maximum inductance for the device in the Inductance field. 3.
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ComponentRef.book Page 36 Thursday, December 7, 2006 10:12 AM Basic Components Characteristic Equation and Model This component’s inductance, L, is computed based on the initial settings according to the equation: L= Setting 100 * Inductance The variable inductor is simulated as an open circuit with a current across the inductor forced to zero by a large impedance value. 2.
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ComponentRef.book Page 37 Thursday, December 7, 2006 10:12 AM Pullup its resistance will increase by 10k steps until it reaches the potentiometer’s maximum value of 200k ohms. To decrease the value using the keyboard, press and hold SHIFT and press the identified key. For example, say the potentiometer is set to 45%, the increment is 5% and the key is R. Press R, and the setting increases to 50%. Press R again, and it increases to 55%. Press SHIFT and R, and the setting decreases to 50%.
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ComponentRef.book Page 38 Thursday, December 7, 2006 10:12 AM Basic Components 2.17 Resistor Packs Resistor packs are collections of resistors within a single package. The configuration of the resistors can be varied based on the intended usage of the package. Resistor packs are used to minimize the amount of space required on the PCB for the design. In some applications, noise can be a consideration for the use of resistor packs. 2.
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ComponentRef.book Page 39 Thursday, December 7, 2006 10:12 AM Magnetic Core 2.21 Magnetic Core This component is a conceptual model that you can use as a building block to create a wide variety of inductive and magnetic circuit models. Typically, you would use the magnetic core together with the coreless coil to build up systems that mock the behavior of linear and nonlinear magnetic components. It takes as input a voltage which it treats as a magnetomotive force (mmf) value.
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ComponentRef.book Page 40 Thursday, December 7, 2006 10:12 AM Basic Components Magnetic Core Parameters and Defaults 2.22 Symbol Parameter Name Default Unit A Cross-sectional area 1 m2 L Core length 1 m ISD Input smoothing domain% 1 - N Number of co-ordinates 2 - H1 Magnetic field co-ordinate 1 0 A*turns/m H2 Magnetic field co-ordinate 2 1.
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ComponentRef.book Page 41 Thursday, December 7, 2006 10:12 AM Z Loads 2.22.1 Characteristic Equation Vout = N ∗ iin where: Vout = output voltage value (magnetomotive force) iin = input current 2.22.2 Coreless Coil Parameters and Defaults 2.23 Symbol Parameter Name Default Unit N Number of inductor turns 1 - Z Loads 2.23.1 A+jB Block The A+jB Block is a circuit block with resistance and inductance connected in series.
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ComponentRef.book Page 42 Thursday, December 7, 2006 10:12 AM Basic Components 2.23.2 A-jB Block The A- jB Block is a circuit block with resistance and capacitance connected in series. “A” is resistance, “B” is capacitive reactance (XC) at a specified frequency and XC = j 2 = −1 . 1 2πfC where f is the specified frequency and C is the capacitance. 2.23.3 Z Load 1 Z Load 1 is a circuit block with values of R, L and C as shown. 2.23.
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ComponentRef.book Page 43 Thursday, December 7, 2006 10:12 AM Z Loads 2.23.5 Z Load 1 Wye Z Load 1 Wye is a delta connection of three Z Load 1s as shown. 2.23.6 Z Load 2 Z Load 2 is an RLC series connection block with R, L, and C values as shown. 2.23.7 Z Load 2 Delta Z Load 2 Delta is a delta connection of three Z Load 2s as shown.
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ComponentRef.book Page 44 Thursday, December 7, 2006 10:12 AM Basic Components 2.23.8 Z Load 2 Wye Z Load 2 Wye is a wye connection of three Z Load 2s as shown. 2.23.9 Z Load 3 Z Load 3 is a circuit block with an RLC parallel connection with R, L and C values as shown. Multisim Component Reference Guide 2-44 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter Diodes 3.1 3 Diode Diodes allow current to flow in only one direction and can therefore be used as simple solidstate switches in AC circuits, being either open (not conducting) or closed (conducting). Terminal A is called the anode and terminal K is called the cathode. 3.1.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Diodes 3.1.2 DC Model The DC characteristic of a real diode in Multisim is divided into the forward and reverse characteristics.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Diode 3.1.3 Time-Domain Model This model defines the operation of the diode, taking into account its charge-storage effects or capacitance. There are two types of capacitances: diffusion or storage capacitance, and depletion or junction capacitance.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Diodes 3.1.4 AC Small-Signal Model The figure below shows the linearized, small-signal diode model, in which the diode is represented by a small-signal conductance, gD. The small-signal capacitance is also evaluated at the DC operating point.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM Pin Diode 3.2 Symbol Parameter Name Default Typical Value Unit BV Reverse bias breakdown voltage 1e+30 - V N Emission coefficient 1 1 - EG Activation energy 1.11 1.11 eV XTI Temperature exponent for effect on IS 3.0 3.0 - KF Flicker noise coefficient 0 0 - AF Flicker noise exponent 1 1 - FC Coefficient for forward-bias depletion capacitance formula 0.5 0.5 - IBV Current at reverse breakdown voltage 0.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Diodes 3.3 Zener Diode A zener diode is designed to operate in the reverse breakdown, or Zener, region, beyond the peak inverse voltage rating of normal diodes. This reverse breakdown voltage is called the Zener test voltage (Vzt), which can range between 2.4 V and 200 V. In the forward region, it starts conducting around 0.7 V, just like an ordinary silicon diode.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM Zener Diode where: ID = current through the diode in amperes VD = voltage across the diode in volts VT = thermal voltage (= 0.0258 volts at room temperature (27°C)) BV = breakdown voltage IS is equivalent to the reverse saturation current (Io) of a diode. In a real diode, IS doubles for every 10-degree rise in temperature. Other symbols used in these equations are defined in the table below. 3.3.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Diodes 3.4 Symbol Parameter name Default Unit FC Coefficient for forward-bias depletion capacitance formula 0.5 - TNOM Parameter measurement temperature 27 °C LED (Light-Emitting Diode) This diode emits visible light when forward current through it, Id, exceeds the turn-on current, Ion. LEDs are used in the field of optoelectronics.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Bar LED 3.4.2 3.5 LED Parameters and Defaults Symbol Parameter Name Default Unit IS Saturation current 1e-14 A RS Ohmic resistance 0 W CJO Zero-bias junction capacitance 0 F VJ Junction potential 1 V TT Transit time 0 s M Grading coefficient 0.5 - Bar LED The bar LED comes in assorted colors and 4-, 8-, and 10-segment sizes. To adjust the On Current (Ion), double-click on the component and select the Value tab.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Diodes 3.6 Full-Wave Bridge Rectifier The full-wave bridge rectifier uses four diodes to perform full-wave rectification of an input AC voltage. Two diodes conduct during each half cycle, giving a full-wave rectified output voltage. The top and bottom terminals can be used as the input terminals for the AC voltage. The left and right terminals can be used as the output DC terminals. 3.6.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM Full-Wave Bridge Rectifier 3.6.3 Full-Wave Bridge Rectifier Parameters and Defaults Symbol Parameter Name Default Typical Value Unit IS Saturation current 1e-14 1e-9 - 1e-18 cannot be 0 A RS Ohmic resistance 0 10 W CJO Zero-bias junction capacitance 0 0.01-10e-12 F VJ Junction potential 1 0.05-0.7 V TT Transit time 0 1.0e-10 s M Grading coefficient 0.5 0.33-0.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Diodes 3.7 Schottky Diode The Schottky diode is a two-terminal device with a junction that uses metal in place of the ptype material. The formation of a junction with a semiconductor and metal results in very little junction capacitance. The Schottky diode will have a VF of approximately 0.3 V and a VBR of less than − 50 V. These are lower than the typical pn-junction ratings of VF = 0.7 V and VBR = −1 50 V.
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM Silicon-Controlled Rectifier 3.8.1 Model The SCR is simulated using a mixed electrical and behavioral model. The status of the SCR is handled with a logical variable, much like the Shockley diode and diac simulations. The resistance, Rs, acts as a current block when the SCR is switched off. Rs has two separate values, depending on the status of the SCR.
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM Diodes 3.8.3 AC Small-Signal Model In the AC model, the diode is represented by its linearized small-signal model. The diode small-signal conductance gd and the small-signal capacitance Cd are evaluated at the DC operating point. 3.8.4 3.9 SCR Parameters and Defaults Symbol Parameter Name Default Unit Irdm Peak off-state current 1e-06 A Vdrm Forward breakover voltage 200 V Vtm Peak on-state voltage 1.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM DIAC 3.9.1 DC Model The diac is switched on and the resistance, Rs, is set low if, in either the positive or negative direction.
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ComponentRef.book Page 16 Thursday, December 7, 2006 10:12 AM Diodes 3.9.3 3.10 DIAC Parameters and Defaults Symbol Parameter Name Default Unit IS Saturation current 1e-06 A Vs Switching voltage 100 V Vtm Peak on-state voltage 1.5 V Itm Forward current at which Vtm is measured 1 A Tq Turn-off time 1e-06 s Ih Holding current 0.
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ComponentRef.book Page 17 Thursday, December 7, 2006 10:12 AM TRIAC When the triac is off, the resistance Rs is set high to act as a current block. When the triac is on, Rs is low (1e-06).  V d rm     I d rm  The triac is switched on in either direction if: Vd ≥ Vdrm Rs = 1e - 06 or Vd ≥ 0 and Ig ≥ Igt at Vg ≥ Vgt or d Vd d V ≥ dt dt of the triac The triac is switched off and the resistance Rs is set high (current-blocking mode) if: Id < Ih.
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ComponentRef.book Page 18 Thursday, December 7, 2006 10:12 AM Diodes 3.11 Varactor Diode The varactor is a type of pn-junction diode with relatively high junction capacitance when reverse biased. The capacitance of the junction is controlled by the amount of reverse voltage applied to the device, which makes the device function as a voltage-controlled capacitor.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 4 Transistors 4.1 BJT (NPN & PNP) A bipolar junction transistor, or BJT, is a current-based valve used for controlling electronic current. BJTs are operated in three different modes, depending on which element is common to input and output: common base, common emitter or common collector. The three modes have different input and output impedances and different current gains, offering individual advantages to a designer.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Transistors 4.1.1 Characteristic Equations IE = IC + IB IC βDC = = hFE IB ∆IC βAC = = OP(VCE ) =hfe ∆IB where: βDC = hFE = DC current gain βAC = hfe = small-signal current gain IC = collector current IB = base current ∆IE = emitter current The model for the PNP transistor is the same as the NPN model, except the polarities of the terminal currents and voltages are reversed.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM BJT (NPN & PNP) I CE = IS K qb    V BE  exp  V Τ  − 1   I CC = IS K qb    VBC  exp  V Τ  − 1   − I CC I CT = I CE    V BE  I B E 1 = I S exp   − 1  VΤ       VBC  I B C 1 = I S exp   − 1   VΤ   where: VT = thermal voltage = 0.0258 VA = forward early voltage The model parameter βf is equivalent to βDC in the DC case and βAC in the AC case.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Transistors model are represented by their energy storage model derived using the appropriate numerical integration rule.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM BJT (NPN & PNP) and for the base-collector junction, CBC and CJX, F2 = (1 − FC ) 1+ mC F3 = 1 − FC(1 + mC ) The symbols used in these equations are defined in “BJT Model Parameters and Defaults.” 4.1.3 AC Small-Signal Model The small-signal model of a BJT is automatically computed during linearization of the DC and large-signal time-domain models. The circuit shown is the Gummel-Poon small-signal model of an NPN transistor.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Transistors 4.1.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM BJT (NPN & PNP) Symbol Parameter Name Default Example Unit IRB Current for base resistance equal to (rb+RBM)/2 1e+30 0.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Transistors 4.2 Resistor Biased BJT (NPN & PNP) Resistor biased BJTs are discrete transistors which have had additional resistors added to them within a standard transistor package. This is done to reduce the space required on the PCB for the design. The general application is for transistor switches for displays such as LED and Hex displays. They come in two varieties: with a NPN transistor or a PNP transistor. 4.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Darlington Transistor (NPN & PNP) 4.3.1 DC Bias Model If a Darlington transistor with a very high current gain, βD, is used, the base current may be calculated from V CC – V BE I B = -------------------------RB + βD RE This equation is the same for a regular transistor, however, the value of βD is much greater, and the value of VBE is larger.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Transistors 4.3.2.2 AC Current Gain The AC circuit gain is as follows: RB βD RB A i = β D -------------------------- = -------------------------R B + βD R E RB + βD R E 4.4 BJT Array BJT arrays are collections of discrete transistors on a single die. They can come in many variations based on their intended application.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM P-Channel MOSFET This array is useful in applications including differential amplifiers, DC amplifiers, level shiftors, timers, thyristor firing circuits and operational amplifiers. 4.4.3 General-purpose High-current NPN Transistor Array This array consists of five high-current NPN transistors on a common monolithic substrate.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Transistors The 4-Terminal Enhanced P-MOSFET is a p-channel enhancement MOSFET. Because the substrate and source leads are not connected, it has four terminals. 4.7.1 Depletion MOSFETs Like a JFET, a depletion MOSFET consists of a length of p-type (for a p-channel MOSFET) or n-type (for an n-channel MOSFET) semiconductor material, called the channel, formed on a substrate of the opposite type.
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM Transistors 4.7.5 AC Small-Signal Model In the linearized small-signal model, the junction diodes used to model the MOSFETs are replaced by their equivalent small-signal models. CGB, CGS, CGD are zero-bias junction capacitances. dI D OP dVGS dI D g DS = OP dVGS dI D gmBS = OP dVBS gm = 4.7.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM MOSFET Symbol Parameter Name Default Unit CGSO Gate-source overlap capacitance per meter channel width 0 F CBD Zero-bias bulk-drain junction capacitance 0 F CBS Zero-bias bulk-source junction capacitance 0 F PB Bulk-junction potential 0.8 V RSH Drain and source diffusion sheet resistance 0 W CJ Zero-bias bulk junction bottom capacitance per m2 of junction area 0 F/m2 MJ Bulk junction bottom grading coefficient 0.
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ComponentRef.book Page 16 Thursday, December 7, 2006 10:12 AM Transistors 4.8 MOSFET Thermal Model This is an interactive device that lets you simulate the heat generated in a MOSFET. Pressing “T” on your keyboard lets you toggle the displayed parameter between Junction, Dielectric Bond and Case. The following thermal electrical equivalent circuit represents the device’s model.
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ComponentRef.book Page 17 Thursday, December 7, 2006 10:12 AM JFETs (Junction FETs) 4.9 JFETs (Junction FETs) The JFET is a unipolar, voltage-controlled transistor that uses an induced electrical field to control current. The current through the transistor is controlled by the gate voltage. The more negative the voltage, the smaller the current. A JFET consists of a length of an n-type or p-type doped semiconductor material called a channel. The ends of the channel are called the source and the drain.
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ComponentRef.book Page 18 Thursday, December 7, 2006 10:12 AM Transistors VGS(off) = gate-source cutoff voltage, in volts IS = saturation current for the gate-drain and gate-source diode junctions ID = drain-to-source current, in amperes IDSS = drain-to-source saturation current, in amperes β= IDSS = transconductance parameter in A/V2 [VGS ( off )] 2 l = channel-length modulation parameter measured in 1/V Other symbols used in these equations are defined in “JFET Model Parameters and Defaults”.
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ComponentRef.book Page 19 Thursday, December 7, 2006 10:12 AM JFETs (Junction FETs) 4.9.2 JFET Model Parameters and Defaults Symbol Parameter Name Default Example Unit VTO Threshold voltage -2 -2 V BETA Transconductance coefficient 0.
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ComponentRef.book Page 20 Thursday, December 7, 2006 10:12 AM Transistors 4.10 Power MOSFET (N/P) The double-diffused or DMOS transistor is an example of a power MOSFET. This device is fabricated on a lightly doped n-type substrate with a heavily doped region at the bottom for drain contact. Two diffusions are used, one to create the p-type body region and another to create the n-type source region.
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ComponentRef.book Page 21 Thursday, December 7, 2006 10:12 AM N-Channel & P-Channel GaAsFET 4.12 N-Channel & P-Channel GaAsFET This component is a high-speed field-effect transistor that uses gallium arsenide (GaAs) as the semiconductor material rather than silicon. It is generally used as a very high frequency amplifier (into the gigahertz range). A GaAsFET consists of a length of n-type or p-type doped GaAs called the channel. The ends of the channel are called the source and the drain.
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ComponentRef.book Page 22 Thursday, December 7, 2006 10:12 AM Transistors 4.12.2 GaAsFET Parameters and Defaults 4.13 Symbol Parameter name Default Unit VTO Pinch-off voltage -2 V BETA Transconductance 0.0001 A/V2 B Doping tail extending parameter 0.
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ComponentRef.book Page 23 Thursday, December 7, 2006 10:12 AM Unijunction Transistors about 10 compared with those of conventional n-channel power MOSFETs of similar size and voltage capability. Changes to the epitaxial structure and the addition of recombination centers are responsible for the reduction in the fall time and an increase in the latching current level of the IGBT. Fall times as low as 0.1µs and latching currents as high as 50A can be achieved, while retaining on-resistance values <0.
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ComponentRef.book Page 24 Thursday, December 7, 2006 10:12 AM Transistors Multisim Component Reference Guide 4-24 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 5 Analog Components 5.1 Opamp An ideal operational amplifier (Opamp) is an amplifier with infinite gain, infinite input impedance and zero output impedance. With the application of negative feedback, Opamps can be used to implement functions such as addition, subtraction, differentiation, integration, averaging and amplification.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Analog Components compensated Opamps, the -3 dB corner frequency can be changed by adding an external capacitor. 5.1.2 • unity-gain bandwidth This is the frequency at which the gain of the opamp is equal to 1. This is the highest frequency at which the opamp can be used, typically as a unity gain buffer.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Opamp 5.1.3 Opamp: Simulation Models Several types of simulation models are included in Multisim. The following model levels are used to distinguish between the various models: • • • Virtual 3T — this is the simplest model with the opamp modeled as a gain block with a differential input and a single ended output. Virtual 5T — this is a more complex model in which the supply voltages are included in the simulation.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Analog Components The same model is used for DC, time-domain and AC analyses.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM Opamp A third stage is introduced by specifying the location of the second pole: 1 2π ∗ R2 ∗ f P 2 C2 = R2 = 1 kΩ R3 = ROUT I3 = A1/ 3 ∗VIN R3 where fu = unity-gain bandwidth in hertz; i.e., the frequency at which the open-loop voltage gain equals 1. fP2 = second-pole frequency. A third stage may be introduced by specifying the location of a second pole in hertz.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Analog Components • common mode rejection (CMRR) • input bias current • input offset current • input bias current • input offset voltage • input bias voltage • output voltage swing • output current limiting The internal components of a 741 opamp are shown below. The circuit is divided into three stages. The input stage consists of ideal transistors, Q1 and Q2, and associated sources and passive elements.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM Opamp V OS   I S 2 = I S 1 1 + 0.025    C1 = CC t a n ∆ϕ 2 The interstage provides the DM and CM gains and consists of voltage-controlled current sources gcm, ga and gb and resistors, R02 and R2. The dominant time constant of the opamp is provided by the internal feed-back capacitor, cc. In some opamps, the two nodes of cc are made available to the outside world for external compensation.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Analog Components Output stage: I x = 2 * I c gb − I SC   I SD = I x exp  − R01*I SC   0.025  0.025 I x RCC = ln 100i x I SD GC = 1 RC I + VC = VCC − VSW + VΤ ∗ I n I SC SD I SC − VE = Vee − VSW + VΤ ∗ I n I SD 5.1.3.3 Real Models Models are supplied by various manufacturers of real-world opamps.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Comparator 5.3 Comparator A comparator is an IC operational-amplifier whose halves are well balanced and without hysteresis and is therefore suitable for circuits in which two electrical quantities are compared. The comparator components may model conversion speed, quantization error, offset error and output current limitation.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Analog Components 5.3.1 Comparator: Simulation models A virtual comparator is provided along with several levels of simulation models of increasing complexity and accuracy. Similar to the opamps, the real models are developed by the manufacturers and may have additional pins to model added functions. 5.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM Special Function 5.5 Special Function These are a group of analog devices that are used for the following applications: • • • • • • 5.5.1 instrumentation amplifier video amplifier multiplier/divider preamplifier active filter high precision reference Special Function: Simulation models The same levels of simulation model as the opamps are provided with several levels of simulation models of increasing complexity and accuracy.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Analog Components Multisim Component Reference Guide 5-12 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter TTL 6.1 6 Standard TTL The characteristics of the standard TTL series can be illustrated by the 7400 quad NAND gate IC. The 74 series uses a nominal supply voltage (VOC) of 5V and can operate reliably over the range 4.75 to 5.25 V. The voltages applied to any input of a standard 74 series IC must never exceed +5.5 V. The maximum negative voltage that can be applied to a TTL input is -0.5 V.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM TTL 6.3 Low-Power Schottky TTL The low-power Schottky TTL (the 74LS series) is lower in power and slower in speed than the 74S series. It uses the Schottky-clamped transistor, but with larger resistor values than the 74S series. The larger resistor values reduce the power requirements of the circuit, but increase the switching times. A NAND gate in the 74LS series typically has an average propagation delay of 9.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM 74xx 6.4.2 74xx01 (Quad 2-In NAND) This device contains four independent 2-input NAND gates. Logic function: NAND gate truth table: 6.4.3 A B Y 0 1 0 1 0 0 1 1 1 1 1 0 74xx02 (Quad 2-In NOR) This device contains four independent 2-input NOR gates. Logic function: NOR gate truth table: 6.4.4 A B Y 0 1 0 1 0 0 1 1 1 0 0 0 74xx03 (Quad 2-In NAND (Ls-OC)) This device contains four independent 2-input NAND gates.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM TTL NAND gate truth table: 6.4.5 A B Y 0 0 1 1 0 1 0 1 1 1 1 0 74xx04 (Hex INVERTER) This device contains six independent INVERTER gates. Logic function: INVERTER gate truth table: 6.4.6 A Y 1 0 0 1 74xx05 (Hex INVERTER (OC)) This device contains six independent INVERTER gates. For correct performance, the open collector outputs require pull-up resistors.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM 74xx 6.4.7 74xx06 (Hex INVERTER (OC)) This device contains six independent INVERTER gates. For correct performance, the open collector outputs require pull-up resistors. Logic function: INVERTER gate truth table: 6.4.8 A Y 1 0 0 1 74xx07 (Hex BUFFER (OC)) This device contains six independent BUFFER/non-inverting gates. For correct performance, the open collector outputs require pull-up resistors.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM TTL AND gate truth table: A B Y 0 1 0 1 0 0 1 1 0 0 0 1 6.4.10 74xx09 (Quad 2-In AND (OC)) This device contains four independent 2-input AND gates. For correct performance, the open collector outputs require pull-up resistors. Logic function: AND gate truth table: A B Y 0 1 0 1 0 0 1 1 0 0 0 1 6.4.11 74xx10 (Tri 3-In NAND) This device contains three independent 3-input NAND gates.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM 74xx NAND gate truth table A B C Y 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 6.4.12 74xx100 (8-Bit Bist Latch) The 74100 is an 8-bit bistable latch. 8-bit bistable latch truth table: 6.4.13 74xx107 (Dual JK FF(clr)) This device is a positive pulse-triggered flip-flop. It contains two independent J-K flip-flops with individual J-K, clock, and direct clear inputs.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM TTL 6.4.14 74xx109 (Dual JK FF (+edge, pre, clr)) This device contains two independent J-K positive edge-triggered flip-flops. JK flip-flop truth table: 6.4.15 74xx11 (Tri 3-In AND) This device contains three independent 3-input AND gates. Logic function: Y = ABC AND gate truth table: A B C Y 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 Multisim Component Reference Guide 6-8 ni.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM 74xx 6.4.16 74xx112 (Dual JK FF(-edge, pre, clr)) This device contains two independent J-K negative edge-triggered flip-flops. JK flip-flop truth table: 6.4.17 74xx113 (Dual JK MS-SLV FF (-edge, pre)) This device contains two independent J-K negative edge-triggered flip-flops.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM TTL 6.4.18 74xx114 (Dual JK FF (-edge, pre, com clk & clr)) This device contains two independent J-K negative edge-triggered flip-flops. JK flip-flop truth table: 6.4.19 74xx116 (Dual 4-bit latches (clr)) This device contains two independent 4-bit latches. Each 4-bit latch has an independent asynchronous clear input and a gated two-input enable circuit.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM 74xx 6.4.20 74xx12 (Tri 3-In NAND (OC)) This device contains three independent 3-input NAND gates. For correct performance, the open collector outputs require pull-up resistors. Logic function: Y = ABC NAND gate truth table: A B C Y 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 6.4.21 74xx125 (Quad bus BUFFER w/3-state Out) This device contains four independent BUFFER/non-inverting gates with 3-state outputs.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM TTL 6.4.22 74xx126 (Quad bus BUFFER w/3-state Out) This device contains four independent BUFFER/non-inverting gates with 3-state outputs. BUFFER gate truth table A G Y 1 0 X 1 1 0 1 0 Z Z = high impedance The output of the bus buffer is disabled when G is low. 6.4.23 74xx13 (Dual 4-In NAND (Schmitt)) This device is a dual 4-input Schmitt-triggered NAND gate. 6.4.
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM 74xx NAND gate truth table INPUTS A THRU M Y All inputs 1 One or more inputs 0 0 1 6.4.26 74xx134 (12-In NAND w/3-state Out) 12-Input NAND with 3-state outputs: INPUTS A THRU L OC Y All inputs 1 One or more inputs 0 Don't care 0 0 1 0 1 Z Z = high impedance (off) 6.4.27 74xx135 (Quad Ex-OR/NOR Gate) This device can operate as Exclusive-OR gate (C input low) or as Exclusive-NOR gate (C input high).
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM TTL 6.4.28 74xx136 (Quad 2-in Exc-OR gate) This device is a quadruple 2-input exclusive-OR gate with open-collector outputs. Exclusive-OR gate truth table: INPUTS OUTPUT A B Y 0 0 1 1 0 1 0 1 0 1 1 0 6.4.29 74xx138 (3-to-8 Dec) This device decodes one of eight lines dependent on the conditions at the three binary select inputs and the three enable inputs.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM 74xx 6.4.30 74xx139 (Dual 2-to-4 Dec/DEMUX) This decoder/demultiplexer contains two individual two-line to four-line decoders. It features fully buffered inputs, each of which represents only one normalized load to its driving circuit. 2-to-4 decoder/demultiplexer truth table: INPUTS OUTPUTS ENABLE SELECT G B A Y0 Y1 Y2 Y3 1 0 0 0 0 X 0 0 1 1 X 0 1 0 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 6.4.
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ComponentRef.book Page 17 Thursday, December 7, 2006 10:12 AM 74xx 6.4.34 74xx148 (8-to-3 Priority Enc) This TTL encoder features priority decoding of the inputs to ensure that only the highestorder data line is encoded. It encodes eight data lines to three-line (4-2-1) binary (octal).
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ComponentRef.book Page 18 Thursday, December 7, 2006 10:12 AM TTL Truth table: INPUTS OUTPUTS D C B A G W X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 X 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 EO E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 6.4.37 74xx151 (1-of-8 Data Sel/MUX) This data selector/multiplexer contains full on-chip binary decoding to select the desired data source.
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ComponentRef.book Page 19 Thursday, December 7, 2006 10:12 AM 74xx 6.4.38 74xx152 (Data Sel/MUX) This data selector/multiplexer contains full on-chip binary decoding to select one-of-eight data sources. Data selector/multiplexer truth table: SELECT INPUTS OUTPUT C B A W 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 D0 D1 D2 D3 D4 D5 D6 D7 6.4.
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ComponentRef.book Page 20 Thursday, December 7, 2006 10:12 AM TTL 6.4.40 74xx154 (4-to-16 Dec/DEMUX) This 4-line-to-16-line decoder uses TTL circuitry to decode four binary-coded inputs into one of sixteen mutually exclusive outputs when both the strobe inputs are low.
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ComponentRef.book Page 21 Thursday, December 7, 2006 10:12 AM 74xx 6.4.41 74xx155 (Dual 2-to-4 Dec/DEMUX) This device features a dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address inputs. Decoder/demultiplexer truth table: SELECT STROBE DATA OUTPUTS A B G C Y0 Y1 Y2 Y3 X 0 0 1 1 X X 0 1 0 1 X 1 0 0 0 0 X X 1 1 1 1 0 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1 0 1 6.4.
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ComponentRef.book Page 22 Thursday, December 7, 2006 10:12 AM TTL Data selector/multiplexer truth table: STROBE SELECT OUTPUTS G A/B A B Y 1 0 0 0 0 X 0 0 1 1 X 0 1 X X X X X 0 1 0 0 1 0 1 6.4.44 74xx158 (Quad 2-to-1 Data Sel/MUX) This device contains inverters and drivers to supply full on-chip data selection to the four output gates. It presents inverted data to minimize propagation delay time. A 4-bit word is selected from one of two sources and is routed to the four outputs.
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ComponentRef.book Page 24 Thursday, December 7, 2006 10:12 AM TTL 6.4.47 74xx160 (Sync 4-bit Decade Counter (clr)) This synchronous, presettable decade counter features an internal carry look-ahead for fast counting.
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ComponentRef.book Page 27 Thursday, December 7, 2006 10:12 AM 74xx 6.4.51 74xx164 (8-bit Parallel-Out Serial Shift Reg) This 8-bit shift register has gated serial inputs and an asynchronous clear. Shift register truth table: 6.4.52 74xx165 (Parallel-load 8-bit Shift Reg) This serial shift-register shifts the data in the direction of QA toward QH when clocked. To load the data at the 8-inputs into the device, apply a low level at the shift/load input.
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ComponentRef.book Page 28 Thursday, December 7, 2006 10:12 AM TTL 6.4.53 74xx166 (Parallel-load 8-bit Shift Reg) This shift-register is a parallel-in or serial-in, serial out device. It shifts the data in the direction of QA toward QH when clocked. It features an active-low clear input. To load the data at the 8-inputs into the device, apply a low level at the shift/load input.
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ComponentRef.book Page 29 Thursday, December 7, 2006 10:12 AM 74xx 6.4.55 74xx17 (Hex BUFFER (OC)) This device contains six independent BUFFER/Drivers. For correct performance, the open collector outputs require pull-up resistors. BUFFER gate truth table: A Y 0 0 1 1 6.4.
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ComponentRef.book Page 30 Thursday, December 7, 2006 10:12 AM TTL 6.4.57 74xx174 (Hex D-type FF (clr)) D-type flip-flop truth table: 6.4.58 74xx175 (Quad D-type FF (clr)) D-type flip-flop truth table: 6.4.59 74xx180 (9-bit Odd/even Par GEN) This 9-bit (8 data bits plus 1 parity bit) parity generator/checker features odd/even outputs and control inputs to facilitate operation in either odd- or even-parity applications. Multisim Component Reference Guide 6-30 ni.
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ComponentRef.book Page 31 Thursday, December 7, 2006 10:12 AM 74xx Parity generator/checker truth table: INPUTS OUTPUTS S S S OF H’s AT A EVEN ODD THRU H EVEN ODD Even Odd Even Odd X X 1 1 0 0 1 0 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 0 1 6.4.
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ComponentRef.book Page 32 Thursday, December 7, 2006 10:12 AM TTL 6.4.61 74xx182 (Look-ahead Carry GEN) The high-speed, look-ahead carry generator can anticipate a carry across four binary adders or groups of adders. It is cascadable to perform full look-ahead across n-bit adders.
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ComponentRef.book Page 34 Thursday, December 7, 2006 10:12 AM TTL 6.4.62 74xx190 (Sync BCD up/down Counter) This device is a synchronous, BCD, reversible up/down counter. Counter TC and RC truth table: TERMINAL COUNT STATE INPUTS OUTPUTS U/D CE CP Q0 Q1 Q2 Q3 TC RC 1 0 0 0 1 1 1 1 0 1 1 0 X X 1 1 1 0 0 0 X X X 0 0 0 X X X 0 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 1 1 0 X = = = = X X 1 1 High voltage level Low voltage level Don’t care Low pulse Multisim Component Reference Guide 6-34 ni.
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ComponentRef.book Page 35 Thursday, December 7, 2006 10:12 AM 74xx 6.4.63 74xx191 (Sync 4-bit up/down Counter) This device is a synchronous, 4-bit binary, reversible up/down counter. Counter TC and RC truth table: INPUTS TERMINAL COUNT STATE OUTPUTS U/D CE CP Q0 Q1 Q2 Q3 TC RC 1 0 0 0 1 1 1 1 0 1 1 0 X X 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 1 1 0 X = = = = X X 1 1 High voltage level Low voltage level Don’t care Low pulse 6.4.
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ComponentRef.book Page 37 Thursday, December 7, 2006 10:12 AM 74xx 6.4.66 74xx194 (4-bit Bidirect Univ. Shift Reg) This bidirectional shift register has parallel-inputs, parallel outputs, right-shift and left-shift serial inputs, operating-mode-control inputs, and a direct overriding clear line.
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ComponentRef.book Page 39 Thursday, December 7, 2006 10:12 AM 74xx · a ... h QA0, QB0, QG0, QH0 QAn, QBn, etc. = = = = transition from low to high the level of steady state input at inputs A through H respectively the level of QA, QB, QG, or QH, respectively, before the indicated steady state input conditions were established the level of QA, QB etc., respectively, before the most recent negative transition of the clock 6.4.
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ComponentRef.book Page 40 Thursday, December 7, 2006 10:12 AM TTL 6.4.70 74xx20 (Dual 4-In NAND) This device contains two independent 4-input NAND gates. Logic function: Y = ABCD NAND gate truth table A B C D Y 1 0 X X X 1 X 0 X X 1 X X 0 X 1 X X X 0 0 1 1 1 1 6.4.71 74xx21 (Dual 4-In AND) This device contains two independent 4-input AND gates.
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ComponentRef.book Page 41 Thursday, December 7, 2006 10:12 AM 74xx 6.4.72 74xx22 (Dual 4-In NAND (OC)) This device contains two independent 4-input NAND gates. For correct performance, the open collector outputs require pull-up resistors. Logic function: Y = ABCD NAND gate truth table: A B C D Y 1 0 X X X 1 X 0 X X 1 X X 0 X 1 X X X 0 0 1 1 1 1 6.4.73 74xx238 (3-to-8 line Dec/DEMUX) The logic levels at the C B and A inputs select one of the eight lines.
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ComponentRef.book Page 42 Thursday, December 7, 2006 10:12 AM TTL 6.4.74 74xx24 (Dual 4-input NAND Schmitt) Each circuit in this device functions as a NAND gate or inverter. Due to the Schmitt action, there are different input threshold levels for positive-going and negative-going signals. 6.4.75 74xx240 (Octal BUFFER w/3-state Out) This device has high fan-out, improved fan-in, and 400-mV noise margin. Octal BUFFER gate truth table: G A Y 1 0 0 X 0 1 Z 1 0 Z = High impedance (off) 6.4.
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ComponentRef.book Page 43 Thursday, December 7, 2006 10:12 AM 74xx Octal BUFFER gate truth table: INPUTS OUTPUTS G A1 A2 A3 A4 Y1 Y2 Y3 Y4 1 0 X X X X X X X X Z A1 Z A2 Z A3 Z A4 Z A1, A2... = = High impedance (off) The level of the respective input 6.4.78 74xx246 (BCD-to-seven segment dec) The BCD-to-seven-segment decoder/driver features active-low outputs designed for driving indicators directly. It has full ripple-blanking input/output controls and a lamp test input.
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ComponentRef.book Page 44 Thursday, December 7, 2006 10:12 AM TTL Notes: 1. The blanking input (BI) must be open or held at a high logic level when output functions 0 through 15 are desired. The ripple-blanking input (RBI) must be open or high if blanking of a decimal zero is not desired. 2. When a low logic level is applied to the blanking input (BI), all segment outputs are off regardless of any other input. 3.
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ComponentRef.book Page 45 Thursday, December 7, 2006 10:12 AM 74xx Notes: 1. The blanking input (BI) must be open or held at a high logic level when output functions 0 through 15 are desired. The ripple-blanking input (RBI) must be open or high if blanking of a decimal zero is not desired. 2. When a low logic level is applied to the blanking input (BI), all segment outputs are off regardless of any other input. 3.
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ComponentRef.book Page 47 Thursday, December 7, 2006 10:12 AM 74xx 6.4.81 74xx249 (BCD-to-seven segment dec) The BCD -to-seven-segment decoder/driver features active-high outputs for driving lamp buffers. It has full ripple-blanking input/output controls and a lamp test input.
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ComponentRef.book Page 48 Thursday, December 7, 2006 10:12 AM TTL Notes: 1. The blanking input (BI) must be open or held at a high logic level when output functions 0 through 15 are desired. The ripple-blanking input (RBI) must be open or high if blanking of a decimal zero is not desired. 2. When a low logic level is applied to the blanking input (BI), all segment outputs are low regardless of any other input. 3.
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ComponentRef.book Page 49 Thursday, December 7, 2006 10:12 AM 74xx Data selector/multiplexer truth table: 6.4.84 74xx253 (Dual 4-to-1 Data Sel/MUX w/3-state Out) This Schottky-clamped data selector/multiplexer contains inverters and drivers to supply fully complementary on-chip, binary decoding data selection to the AND-OR gates. Data selector/multiplexer truth table: 6.4.
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ComponentRef.book Page 50 Thursday, December 7, 2006 10:12 AM TTL Data selector/multiplexer truth table: OUTPUT CONTROL 1 0 0 0 0 Z = SELECT A B Y X 0 0 1 1 X X X 0 1 Z 0 1 0 1 X 0 1 X X High impedance (off) 6.4.86 74xx258 (Quad 2-to-1 line Data Sel/MUX) This device is designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. Its 3-state outputs interface directly with the system bus.
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ComponentRef.book Page 51 Thursday, December 7, 2006 10:12 AM 74xx 6.4.87 74xx259 (8-bit Latch) This 8-bit addressable latch is a 1-of-8 decoder or demultiplexer with active high outputs. It stores single-line data in eight addressable latches. 8-bit addressable latch truth table: INPUTS CLEAR G OUTPUT OF ADDRESSED LATCH 1 1 0 0 0 1 0 1 D Qi0 D 0 EACH OTHER FUNCTION OUTPUT Qi0 Qi0 0 0 Addressable latch Memory 8-line demultiplexer Clear 6.4.
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ComponentRef.book Page 52 Thursday, December 7, 2006 10:12 AM TTL Exclusive-NOR gate truth table: A B Y 0 0 1 1 0 1 0 1 1 0 0 1 6.4.90 74xx27 (Tri 3-In NOR) This device contains three independent 3-input NOR gates. Logic function: Y = A+B+C NOR gate truth table: A B C Y 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 Multisim Component Reference Guide 6-52 ni.
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ComponentRef.book Page 53 Thursday, December 7, 2006 10:12 AM 74xx 6.4.91 74xx273 (Octal D-type FF) D flip-flop truth table CLEAR CLK D Q 0 1 1 1 0 1 0 Q0 · X · · 0 = X 1 0 X transition from low to high 6.4.92 74xx279 (Quad SR latches) The RS flip-flop has an undesired operating condition, where 1 levels at both inputs will cause both outputs to go to a 0 level. This undefined condition must be avoided.
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ComponentRef.book Page 54 Thursday, December 7, 2006 10:12 AM TTL NOR gate truth table: A B Y 0 1 0 1 0 0 1 1 1 0 0 0 6.4.94 74xx280 (9-bit odd/even parity generator/checker) 9-bit odd/even parity generator/checker truth table: NUMBER OF INPUTS A THROUGH I THAT ARE HIGH Σ ΣEVEN ODD 0, 1, 1 0 Σ 2, 3, = 4, 5, 6, 7, 8 9 0 1 sigma 6.4.95 74xx283 (4-bit Bin Full Add) This device performs the addition of two 4-bit binary numbers.
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ComponentRef.book Page 55 Thursday, December 7, 2006 10:12 AM 74xx 6.4.96 74xx290 (Decade Counter) This device contains four master-slave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-byfive.
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ComponentRef.book Page 56 Thursday, December 7, 2006 10:12 AM TTL Decade counter truth table: COUNT QD QC QB QA R0(1) R0(2) R9(1) R9(2) QD 0 1 2 3 4 5 6 7 8 9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 1 1 X X 0 0 X 1 1 X 0 X X 0 0 X 1 X 0 X 0 X 0 1 0 X 0 X 0 0 0 0 1 0 COUNT COUNT COUNT COUNT 0 0 0 0 0 0 0 0 1 1 QC QB QA 0 0 0 0 0 1 6.4.
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ComponentRef.book Page 57 Thursday, December 7, 2006 10:12 AM 74xx Multiplexer truth table: WORD SELECT CLK QA 0 1 X Ø Ø Ø QB QC QD a1 b1 c1 d1 a2 b2 c2 d2 QA0 QB0 QC0 QD0 ‚ a1, a2, etc. QA0, QB0, etc. = = = transition from high to low the level of steady state input at A1, A2, etc. the level of QA, QB, etc.entered on the most recent negative transition of the clock input 6.4.
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ComponentRef.book Page 58 Thursday, December 7, 2006 10:12 AM TTL OR gate truth table: A B Y 0 1 0 1 0 0 1 1 0 1 1 1 6.4.10174xx33 (Quad 2-In NOR (OC)) This device contains four independent 2-input NOR gates. For correct performance, the open collector outputs require pull-up resistors. Logic function: Y = A+B NOR gate truth table: A B Y 0 1 0 1 0 0 1 1 1 0 0 0 6.4.
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ComponentRef.book Page 59 Thursday, December 7, 2006 10:12 AM 74xx 4-bit shifter truth table: INPUTS OUTPUTS OE S1 S0 Y0 Y1 Y2 Y3 1 0 0 0 0 X 0 0 1 1 X 0 1 0 1 Z D0 D-1 D-2 D-3 Z D1 D0 D-1 D-2 Z D2 D1 D0 D-1 Z D3 D2 D1 D0 Z = High impedance (off) 6.4.10374xx351 (Dual Data Sel/MUX w/3-state Out) The 74351 device is made up of two 8-line-to-1-line data selectors/multiplexors with full decoding on one monolithic chip.
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ComponentRef.book Page 60 Thursday, December 7, 2006 10:12 AM TTL 6.4.10474xx352 (Dual 4-to-1 Data Sel/MUX) This device contains inverters and drivers to supply fully complementary on-chip, binary decoding data selection to the AND-OR-invert gates. Data selector/multiplexer truth table: SELECT DATA INPUTS B A C0 C1 C2 C3 G Y X 0 0 0 0 1 1 1 1 X 0 0 1 1 0 0 1 1 X 0 1 X X X X X X X X X 0 1 X X X X X X X X X 0 1 X X X X X X X X X 0 1 1 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 1 0 6.4.
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ComponentRef.book Page 61 Thursday, December 7, 2006 10:12 AM 74xx 6.4.10674xx365 (Hex Buffer/Driver w/3-state) This device features high fan-out, improved fan-in, and can be used to drive terminated lines down to 133 ohms. Hex buffer/driver truth table: 6.4.10774xx366 (Hex Inverter Buffer/Driver w/3-state) This device is a 3-state Hex inverter buffer/driver.
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ComponentRef.book Page 62 Thursday, December 7, 2006 10:12 AM TTL 6.4.10874xx367 (Hex Buffer/Driver w/3-state) This device features high fan-out, improved fan-in, and can be used to drive terminated lines down to 133 ohms. Hex buffer/driver truth table: 6.4.10974xx368 (Hex Inverter Buffer/Driver w/3-state) This device is a 3-state hex inverter buffer/driver. Hex inverter buffer/driver truth table: Multisim Component Reference Guide 6-62 ni.
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ComponentRef.book Page 63 Thursday, December 7, 2006 10:12 AM 74xx 6.4.11074xx37 (Quad 2-In NAND) This device contains four independent 2-input NAND gates. Logic function: Y = AB NAND gate truth table: A B Y 0 1 0 1 0 0 1 1 1 1 1 0 6.4.111 74xx373 (Octal D-type Transparent Latches) This 8-bit register features three-state bus-driving outputs and transparent D-type latches.
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ComponentRef.book Page 64 Thursday, December 7, 2006 10:12 AM TTL 6.4.11274xx374 (Octal D-type FF (+edge)) This 8-bit register features three-state bus-driving outputs and transparent D-type flip-flops. D-latch and flip-flop truth table: OUTPUT ENABLE ENABLE LATCH D OUTPUT 0 0 0 1 1 0 X X 1 0 Q0 Z Z · · · 0 X = = High impedance (off) Transition from low to high 6.4.11374xx375 (4-bit Bistable Latches) This device features outputs from a 4-bit latch.
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ComponentRef.book Page 65 Thursday, December 7, 2006 10:12 AM 74xx 6.4.11574xx378 (Hex D-type FF w/en) This device contains six flip-flops with single-rail outputs. D-type flip-flop truth table: G CLK DATA Q Q 1 X X Q0 Q0 0 · 1 1 0 0 · 0 0 1 X 0 X QO Q0 6.4.11674xx379 (Quad D-type FF w/en) This device contains four flip-flops with double-rail outputs. D-type flip-flop truth table: INPUTS G OUTPUTS CLK DATA Q Q 1 X X Q0 Q0 0 · 1 1 0 0 · 0 0 1 X 0 X Q0 Q0 6.4.
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ComponentRef.book Page 66 Thursday, December 7, 2006 10:12 AM TTL NAND gate truth table: A B Y 0 1 0 1 0 0 1 1 1 1 1 0 6.4.11874xx39 (Quad 2-In NAND (OC)) This device contains four independent 2-input NAND gates. For correct performance, the open collector outputs require pull-up resistors. Logic function: Y = AB NAND gate truth table: A B Y 0 1 0 1 0 0 1 1 1 1 1 0 6.4.11974xx390 (Dual Div-by-2, Div-by-5 Counter) The 74390 device incorporates dual divide-by-two and divide-by-five counters.
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ComponentRef.book Page 67 Thursday, December 7, 2006 10:12 AM 74xx BCD count sequence truth table: OUTPUT COUNT 0 1 2 3 4 5 6 7 8 9 QD QC QB QA 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 Notes: Output QA is connected to input B for BCD count. Bi-quinary truth table: OUTPUT COUNT 0 1 2 3 4 5 6 7 8 9 QA QD QC QB 0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 0 1 0 0 1 1 0 0 0 1 1 0 0 1 0 1 0 0 1 0 1 0 Notes: Output QD is connected to input A for bi-quinary.
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ComponentRef.book Page 68 Thursday, December 7, 2006 10:12 AM TTL 6.4.12074xx393 (Dual 4-bit Binary Counter) This device features an independent active-high clear and clock input for each counter. The 74393 is ideal for circuits that require two independent counters. The 74393 counts from 0 to 15 in binary on every positive transition (low to high) of the clock pulse.
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ComponentRef.book Page 69 Thursday, December 7, 2006 10:12 AM 74xx 6.4.12174xx395 (4-bit Cascadable Shift Reg w/3-state Out) This device is a 4-bit shift register with 3-state outputs. It features parallel-in and parallel out registers.
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ComponentRef.book Page 70 Thursday, December 7, 2006 10:12 AM TTL 6.4.12374xx42 (4-BCD to 10-Decimal Dec) This BCD-to-decimal decoder consists of eight inverters and ten four-input NAND gates.
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ComponentRef.book Page 71 Thursday, December 7, 2006 10:12 AM 74xx 6.4.12474xx43 (Exc-3-to-Decimal Dec) This excess-3-to-decimal decoder consists of eight inverters and ten four-input NAND gates.
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ComponentRef.book Page 72 Thursday, December 7, 2006 10:12 AM TTL 6.4.12574xx44 (Exc-3-Gray-to-Decimal Dec) This excess-3-gray-to-decimal decoder consists of eight inverters and ten four-input NAND gates.
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ComponentRef.book Page 73 Thursday, December 7, 2006 10:12 AM 74xx 6.4.12874xx445 (BCD-to-Decimal Dec) This BCD-to-decimal decoder consists of eight inverters and ten four-input NAND gates.
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ComponentRef.book Page 74 Thursday, December 7, 2006 10:12 AM TTL 6.4.12974xx45 (BCD-to-Decimal Dec) This BCD-to-decimal decoder consists of eight inverters and ten four-input NAND gates. BCD-to-decimal truth table: 6.4.13074xx46 (BCD-to-seven segment dec) The 7446 BCD (Binary-Coded Decimal)-to-seven-segment decoder translates a 4-bit BCD input into hexadecimal, and outputs high on the output pins corresponding to the hexadecimal representation of the BCD input.
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ComponentRef.book Page 75 Thursday, December 7, 2006 10:12 AM 74xx BCD-to-seven-segment decoder: INPUTS OUTPUTS No.
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ComponentRef.book Page 76 Thursday, December 7, 2006 10:12 AM TTL 6.4.13174xx465 (Octal BUFFER w/3-state Out) This device has a two-input active-low AND enable gate controlling all eight data buffers. Octal buffers truth table: G1 G2 A Y 0 0 1 0 1 0 0 0 1 1 0 1 X X X 0 1 Z Z Z Z = High impedance (off) 6.4.13274xx466 (Octal BUFFER w/3-state Out) This device has a two-input active-low AND enable gate controlling all eight data buffers.
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ComponentRef.book Page 77 Thursday, December 7, 2006 10:12 AM 74xx BCD-to-seven-segment decoder sample truth table: 6.4.13474xx48 (BCD-to-seven segment dec) This device features active-high outputs for driving lamp buffers or common-cathode VLEDs. It also has full ripple-blanking input/output controls and a lamp test input.
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ComponentRef.book Page 78 Thursday, December 7, 2006 10:12 AM TTL BCD-to-seven-segment decoder: INPUTS OUTPUTS No.
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ComponentRef.book Page 79 Thursday, December 7, 2006 10:12 AM 74xx 6.4.13574xx51 (AND-OR-INVERTER) AND-OR INVERTER gate truth table: A B C D Y 0 X 0 X 1 X X 0 X 0 1 X X 0 0 X X 1 0 X X 0 X 1 1 1 1 1 0 0 6.4.13674xx521 (8-Bit Identity Comparitor) The 74F521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA=B also serves as an active LOW enable input.
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ComponentRef.book Page 80 Thursday, December 7, 2006 10:12 AM TTL 6.4.13774xx533 (Octal D-Latch with inverted O/Ps) 6.4.13874xx534 (Octal Flip-Flop with inverted Latches) Multisim Component Reference Guide 6-80 ni.
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ComponentRef.book Page 81 Thursday, December 7, 2006 10:12 AM 74xx 6.4.13974xx54 (4-wide AND-OR-INVERTER) 4-wide AND-OR-INVERTER truth table: INPUTS OUTPUT A B C D E F G H Y 1 X X X X 1 X X X X X 1 X X X X 1 X X X X X 1 X X X X 1 X X X X X 1 X X X X 1 X 0 0 0 0 1 6.4.14074xx55 (2-wide 4-In AND-OR-INVERTER) AND-OR-INVERTER truth table: INPUTS OUTPUT A B C D E F G H Y 1 1 X X 1 1 X X 1 1 X X 1 1 X X 1 X 1 X 1 X 1 X 1 X 1 X 1 X 1 X 0 0 0 1 6.4.
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ComponentRef.book Page 82 Thursday, December 7, 2006 10:12 AM TTL buffers are in the high impedance mode but this does not interfere with entering new data into the latches. 6.4.14274xx574 (Octal D-type Flip-Flop) This device consists of eight edge-triggered flip-flops with individual D-type inputs and 3STATE true outputs. The buffered clock and buffered Output Enable are common to all flipflops.
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ComponentRef.book Page 83 Thursday, December 7, 2006 10:12 AM 74xx 6.4.14374xx640 (Octal Bus Transceiver) 6.4.
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ComponentRef.book Page 84 Thursday, December 7, 2006 10:12 AM TTL 6.4.14574xx69 (Dual 4-bit Binary Counter) Counter number one has two sections - counter A (divide-by-2 section) and counter B, C, D (divide-by-8 section). Counter number two has only divide-by-sixteen section. 4-Bit counter truth table: 1CLR 2CLR 1QA 1QB 1QC 1QD 2QA 2QB 2QC 2QD 1 1 0 0 1 0 1 0 COUNT COUNT 0 0 0 0 0 0 COUNT 0 0 COUNT 0 0 0 0 0 0 0 0 6.4.
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ComponentRef.book Page 85 Thursday, December 7, 2006 10:12 AM 74xx 6.4.14774xx73 (Dual JK FF (clr)) This device contains 2-independent JK flip-flops. JK flip-flop truth table: CLR CLK J K Q 0 1 1 1 1 X 0 0 1 1 0 1 Hold 1 0 0 1 Toggle X · · · · · = X 0 1 0 1 Q triggers on pulse (level sensitive) 6.4.14874xx74 (Dual D-type FF (pre, clr)) This device is equipped with active-low preset and active-low clear inputs.
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ComponentRef.book Page 86 Thursday, December 7, 2006 10:12 AM TTL Bistable latch truth table: INPUTS OUTPUTS D C Q Q 0 1 X 1 1 0 0 1 Q0 1 0 Q0 6.4.15074xx76 (Dual JK FF (pre, clr)) This device contains two independent J-K flip-flops with individual J-K, clock, preset, and clear inputs. JK flip-flop truth table: PRE CLR CLK J K Q 0 1 0 1 1 1 1 X X X 0 0 1 1 1 0 0 1 1 1 Hold 1 0 0 1 Toggle 1 0 0 1 1 1 1 · X X X · · · · = X X X 0 1 0 1 Q pulse triggered (level sensitive) 6.4.
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ComponentRef.book Page 87 Thursday, December 7, 2006 10:12 AM 74xx 6.4.15274xx78 (Dual JK FF (pre, com clk & clr)) The 7478 contains two negative-edge triggered flip-flops with individual JK, individual preset, common clock and common clear inputs.
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ComponentRef.book Page 88 Thursday, December 7, 2006 10:12 AM TTL 6.4.15374xx82 (2-bit Bin Full Adder) This device performs the addition of two 2-bit binary numbers.
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ComponentRef.book Page 89 Thursday, December 7, 2006 10:12 AM 74xx outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. 6.4.15574xx823 (9-Bit D-type Flip-Flop) This device consists of nine D-type edge-triggered flip-flops. It has 3-STATE true outputs and is organized in broadside pinning. The buffered Clock (CP) and buffered Output Enable (OE) are common to all flip-flops.
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ComponentRef.book Page 90 Thursday, December 7, 2006 10:12 AM TTL HIGH, the outputs do not change state regardless of the data or clock inputs transitions. This device is ideal for parity bus interfacing in high performance systems. 6.4.15674xx825 (8-Bit D-Type Flip-Flop) This device consists of eight D-type edge-triggered flip-flops. This device has 3-STATE true outputs and is organized in broadside pinning.
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ComponentRef.book Page 91 Thursday, December 7, 2006 10:12 AM 74xx When the EN is HIGH the outputs do not change state, regardless of the data or clock input transitions. 6.4.15774xx827 (10-Bit Buffers/Line Drivers) This device is a line driver designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC board density. The devices have 3-STATE outputs controlled by the Output Enable (OE) pins.
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ComponentRef.book Page 92 Thursday, December 7, 2006 10:12 AM TTL 6.4.16074xx85 (4-bit Mag COMP) This 4-bit magnitude comparator performs comparison of straight binary and straight BCD (8-4-2-1) codes.
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ComponentRef.book Page 93 Thursday, December 7, 2006 10:12 AM 74xx EXCLUSIVE-OR gate truth table: A B Y 0 0 1 1 0 1 0 1 0 1 1 0 6.4.16274xx90 (Decade Counter) The 7490 counts from 0 to 9 in binary. It contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five.
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ComponentRef.book Page 94 Thursday, December 7, 2006 10:12 AM TTL 6.4.16474xx92 (Divide-by-twelve Counter) The 7492 counts from 0 to 11 in binary. It contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-six. Counter truth table: RESET INPUTS OUTPUT RO1 RO2 Qd 1 0 X 1 X 0 0 0 Count Count Qc Qb Qa 0 0 6.4.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter CMOS 7.1 7 CMOS Overview The complementary MOS (CMOS) logic family uses both P- and N-channel MOSFETS in the same circuit. CMOS is faster and consumes less power than the other MOS families. CMOS ICs provide not only all of the same logic functions available in TTL, but also several special functions not provided by TTL.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM CMOS are greater for CMOS than for TTL, except for the 74 ACT series. These series are designed to be electrically comparable with TTL, so they must accept the same input voltage levels as TTL. 7.1.3 Noise Margins The CMOS devices have greater noise margins than TTL. 7.1.4 Power Dissipation The power dissipation of a CMOS logic circuit is very low when the circuit is in a static state.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.2 4001 (Quad 2-In NOR) This device contains four independent 2-input NOR gates. Logic function: O1 = I1+I2 NOR gate truth table: 7.2.3 I1 I2 O1 0 1 0 1 0 0 1 1 1 0 0 0 4002 (Dual 4-In NOR) This device contains two independent 4-input NOR gates. Logic function: O1 = I1+I2+I3+I4 NOR gate truth table: 7.2.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM CMOS 7.2.5 4008 (4-bit Binary Full Adder) This device is capable of adding two 4-bit binary numbers together. Logic function: = CIN ⊕ A ⊕ B = AB+BCOUT+ACOUT S C 4-bit binary adder truth table: INPUTS 7.2.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.7 40106 (Hex INVERTER (Schmitt)) This device contains six independent INVERTER gates. Due the to the Schmitt-trigger action, this device is ideal for circuits that are susceptible to unwanted small signals, such as noise. Logic function: Y = A INVERTER gate truth table: 7.2.8 A Y 0 1 1 0 4011 (Quad 2-In NAND) This device contains four independent 2-input NAND gates.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM CMOS NAND gate truth table: INPUTS OUTPUTS I1 I2 I3 I4 O1 1 0 X X X 1 X 0 X X 1 X X 0 X 1 X X X 0 0 1 1 1 1 7.2.10 4013 (Dual D-type FF (+edge)) The 4013 device is a dual D-type flip-flop that features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O,O).
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ComponentRef.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM CMOS Shift register truth table: n CP D MR O0 O1 O2 O3 1 2 3 4 · · · · ‚ X D1 D2 D3 D4 X X 0 0 0 0 0 1 D1 D2 D3 D4 X X D1 X D2 D1 D3 D2 no change 0 0 X X X D1 1 0 X · ‚ Dn n = = = = = = = 0 0 HIGH state (the more positive voltage) LOW state (the less positive voltage) state is immaterial positive-going transition negative-going transition either HIGH or LOW number of clock pulse transitions 7.2.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.14 40161 (4-bit Bin Counter) The 40161 device is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), an overriding asynchronous master reset (MR), four parallel data inputs (P0 to P3), three synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP) and count enable trickle (CET)), buffered outputs from all four bit positions (O0 to O3) and a terminal count output (TC). 7.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM CMOS 5-stage Johnson counter truth table: MR CP0 CP1 1 0 0 0 0 0 0 1 0 X · ‚ n X 1 · 0 X 1 ‚ = = = = = = X ‚ 0 X 1 · 0 OPERATION O0 = O5-9 = H; O1 to O9 = L Counter advances Counter advances No change No change No change No change HIGH state (the more positive voltage) LOW state (the less positive voltage) state is immaterial positive-going transition negative-going transition number of clock pulse transitions 7.2.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.19 40175 (Quad D-type Flip-flop) This device is a quadruple edge-triggered D-type flip-flop with four data inputs (D0 to D3), a clock input (CP), an overriding asynchronous master rest input (MR), four buffered outputs (Q0 to Q3), and four complementary buffered outputs (Q0 to Q3).
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM CMOS 7.2.20 4018 (5-stage Johnson Counter) The 4018 device is a 5-stage Johnson counter with a clock input (CP), a data input (D), an asynchronous parallel load input (PL), five parallel inputs (P0 to P4), five active LOW buffered outputs (O0 to O4), and an overriding asynchronous master reset input (MR).
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM 4000 Series ICs Multiplexer truth table: SELECT INPUTS OUTPUTS Sa Sb A0 B0 O0 0 1 1 0 0 1 1 1 0 0 0 1 1 1 1 1 X 0 1 X X 1 X 0 X X X 0 1 X 1 0 0 0 1 0 1 1 1 0 7.2.
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM CMOS 7.2.24 40194 (4-bit Shift Register) The 40194 device is a 4-bit bidirectional shift register with two mode control inputs (S0 and S1), a clock input (CP), a serial data shift left input (DSL), a serial data shift right input (DSR), four parallel data inputs (P0 to P3), an overriding asynchronous master reset input (MR), and four buffered parallel outputs (O0 to O3). 7.2.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.28 4023 (Tri 3-In NAND) This device contains three independent 3-input NAND gates. Logic function: O = I1+I2+I3 NAND gate truth table: I1 I2 I3 O1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 7.2.29 4024 (7-stage Binary Counter) The 4024 is a 7-stage binary ripple counter. A high on MR (Master Reset) forces all counter stages and outputs low.
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ComponentRef.book Page 16 Thursday, December 7, 2006 10:12 AM CMOS 7.2.31 40244 (Dual Octal Non-inv Buffer) The 40244 device is a dual octal non-inverting buffer with 3-state outputs. 7.2.32 40245 (Octal Bus Transceiver) The 40245 device, an octal bus transceiver with 3-state outputs, is designed for 8-line asynchronous, 2-way data communication between data buses. 7.2.33 4025 (Tri 3-In NOR) This device contains three independent 3-input NOR gates.
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ComponentRef.book Page 17 Thursday, December 7, 2006 10:12 AM 4000 Series ICs NOR gate truth table: I1 I2 I3 O1 0 0 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 7.2.34 4027 (Dual JK FF (+edge, pre, clr)) This device contains two independent JK flip-flops with separate preset and clear inputs.
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ComponentRef.book Page 19 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 4-bit binary/BCD decade counter truth table: PL BIN/DEC UP/DN CE CP 1 X X X X 0 0 0 0 0 X 0 0 1 1 X 0 1 0 1 1 0 0 0 0 X 1 0 X = = = = mode parallel load (Pn On) no change count-down, decade count-up, decade count-down, binary count-up, binary HIGH state (the more positive voltage) LOW state (the less positive voltage) state is immaterial positive-going clock pulse edge 7.2.
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ComponentRef.book Page 20 Thursday, December 7, 2006 10:12 AM CMOS 7.2.39 4035 (4-bit Shift Register) The 4035 device is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions (O0 to O3), a true/complement input (T/C) and an overriding asynchronous master reset input (MR).
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ComponentRef.book Page 21 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.40 40373 (Octal Trans Latch) The 40373 device is an 8-bit transparent latch with 3-state buffered outputs. 7.2.41 40374 (Octal D-type Flip-flop) The 40374 device is an octal D-type flip-flop with 3-state buffered outputs with a common clock input (CP). It used primarily as an 8-bit positive edge-triggered storage register for interfacing with a 3-state bus. 7.2.
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ComponentRef.book Page 22 Thursday, December 7, 2006 10:12 AM CMOS 7.2.43 4040 (12-stage Binary Counter) The 4040 device is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0 to O11). 12-stage binary counter truth table: CP MR O0-O11 ‚ ‚ 0 1 Count 0 7.2.44 4041 (Quad True/Complement BUFFER) This device provides both inverted and non-inverted buffered outputs for each input.
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ComponentRef.book Page 23 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.46 4043 (Quad RS latch w/3-state Out) This device contains four independent RS-latches with 3-state outputs. RS-latch truth table: EO Sn Rn On 0 1 1 1 X 0 1 0 X 1 X 0 Z 0 1 Latched 7.2.47 4044 (Quad RS latch w/3-state Out) This device contains four independent RS-latches with 3-state outputs. RS-latch truth table: EO Sn Rn On 0 1 1 1 X 0 X 1 X 1 0 1 Z 1 0 Latched 7.2.
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ComponentRef.book Page 24 Thursday, December 7, 2006 10:12 AM CMOS 7.2.49 4050 (Hex BUFFER) This device contains six independent BUFFER/non-inverting gates. Logic function: Y = A BUFFER gate truth table: A Y 0 1 0 1 7.2.50 4060 (14-Stage Binary Counter & Osc) The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals, ten buffered outputs and an overriding asynchronous master reset input.
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ComponentRef.book Page 25 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.52 4068 (8-In NAND) Logic function: O1 = I0I1I2I3I4I5I6I7 NAND gate truth table: INPUTS I0 THROUGH I7 O1 All inputs 1 One or more inputs 0 | 7.2.53 4069 (Hex INVERTER) This device contains six independent INVERTER gates. Logic function: A = Y INVERTER gate truth table: A Y 0 1 1 0 7.2.54 4070 (Quad 2-In XOR) This device contains four independent 2-input EXCLUSIVE-OR gates.
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ComponentRef.book Page 26 Thursday, December 7, 2006 10:12 AM CMOS EXCLUSIVE-OR gate truth table: A B Y 0 0 1 1 0 1 0 1 0 1 1 0 7.2.55 4071 (Quad 2-In OR) This device contains four independent 2-input OR gates. Logic function: Y = A+B OR gate truth table: A B Y 0 1 0 1 0 0 1 1 0 1 1 1 7.2.56 4072 (Dual 4-In OR) The 4072 device provides the positive dual 4-input OR function. Logic function: Y = A+B+C+D Multisim Component Reference Guide 7-26 ni.
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ComponentRef.book Page 27 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 4-input OR gate truth table: INPUTS OUTPUT A B C D Y 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 7.2.57 4073 (Tri 3-In AND) This device contains three independent 3-input AND gates.
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ComponentRef.book Page 28 Thursday, December 7, 2006 10:12 AM CMOS 7.2.58 4075 (Tri 3-In OR) This device contains three independent 3-input OR gates. Logic function: Y = A+B+C OR gate truth table: A B C Y 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 7.2.
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ComponentRef.book Page 29 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.60 4077 (Quad 2-In XNOR) This device contains four independent 2-input EXCLUSIVE-NOR gates. Logic function: O = A⊕B EXCLUSIVE-NOR gate truth table: An Bn On 0 0 1 1 0 1 0 1 1 0 0 1 7.2.
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ComponentRef.book Page 30 Thursday, December 7, 2006 10:12 AM CMOS If one or more inputs are high, the output is low. INPUTS OUTPUT I0 I1 I2 I3 I4 I5 I6 I7 O1 0 1 X X X X X X X 0 X 1 X X X X X X 0 X X 1 X X X X X 0 X X X 1 X X X X 0 X X X X 1 X X X 0 X X X X X 1 X X 0 X X X X X X 1 X 0 X X X X X X X 1 1 0 0 0 0 0 0 0 0 7.2.62 4081 (Quad 2-In AND) This device contains four independent 2-input AND gates. Logic function: Y = AB AND gate truth table: A B Y 0 1 0 1 0 0 1 1 0 0 0 1 7.
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ComponentRef.book Page 31 Thursday, December 7, 2006 10:12 AM 4000 Series ICs AND gate truth table: A B C D Y 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 7.2.64 4085 (Dual 2-Wide 2-In AND-OR-INVERTER) This device contains a combination of gates (AND, OR and INVERTER).
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ComponentRef.book Page 33 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.65 4086 (4-Wide 2-In AND-OR-INVERTER) This device contains a combination of gates (AND, OR and INVERTER). Logic function: O = I0I1+I2I3+I4I5+I6I7+I8+I9 Inverter gate truth table: INPUTS I0 I1 X X 1 X X X X X 1 X X X I2 I3 I4 I5 OUTPUT I6 I7 I8 X X X X X X 1 X X X X X X X X X X X X X X 1 1 X X X X X X X 1 1 X X X X X X X 1 1 X ANY OTHER COMBINATION OF INPUTS ~I9 O X 0 X X X X 0 0 0 0 0 0 1 7.2.
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ComponentRef.book Page 34 Thursday, December 7, 2006 10:12 AM CMOS 7.2.67 4094 (8-stage Serial Shift Register) The 4094 device is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7.
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ComponentRef.book Page 35 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.69 4502 (Strobed hex INVERTER) This device contains six independent INVERTER gates. INVERTER gate truth table: Dn E EO On 0 1 X X 0 0 1 X 0 0 0 1 1 0 0 Z 7.2.70 4503 (Tri-state hex BUFFER w/Strobe) Four of these six non-inverting buffers (I1 through I4) are enabled by a high on EN1 and the last two (I5 and I6) are enabled by a high on EN2.
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ComponentRef.book Page 36 Thursday, December 7, 2006 10:12 AM CMOS Buffer gate truth table: I EN O 0 1 X 0 0 1 0 1 Z Z X = High impedance = Don’t care 7.2.71 4508 (Dual 4-bit latch) This device contains two independent 4-bit latches. 4-bit latch truth table: 7.2.
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ComponentRef.book Page 37 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.73 4511(BCD-to-seven segment latch/Dec) The 4511 BCD (Binary-Coded Decimal)-to-seven-segment latch decoder translates a 4-bit BCD input into hexadecimal, and outputs high on the output pins corresponding to the hexadecimal representation of the BCD input. There are provisions for lamp testing and for blanking the outputs.
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ComponentRef.book Page 38 Thursday, December 7, 2006 10:12 AM CMOS 7.2.74 4512 (8-In MUX w/3-state Out) This device is a 8-input multiplexer with 3-state outputs. Multiplexer truth table: 7.2.75 4514 (1-of-16 Dec/DEMUX w/Input latches) This device is a 1-of-16 decoder/demultiplexer with input latches. The input latches allow for the user to hold a previous input with the enable input while the inputs change. Multisim Component Reference Guide 7-38 ni.
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ComponentRef.book Page 41 Thursday, December 7, 2006 10:12 AM 4000 Series ICs BCD counter truth table: CP0 CP1 MR MODE · 1 0 0 ‚ 0 ‚ X · 1 X X · 0 ‚ X 0 0 0 0 1 COUNTER ADVANCES COUNTER ADVANCES NO CHANGE NO CHANGE NO CHANGE NO CHANGE O0 TO O3 = LOW 7.2.79 4519 (Quad Multiplexer) The 4519 device provides four multiplexing circuits with common select inputs (SA, SB). Each circuit contains two inputs (An, Bn) and one output (On). 7.2.
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ComponentRef.book Page 42 Thursday, December 7, 2006 10:12 AM CMOS Binary counter truth table: CP0 CP1 · 0 ‚ X · 1 X 1 ‚ X · 0 ‚ X MR MODE 0 0 0 0 0 0 1 COUNTER ADVANCES COUNTER ADVANCES NO CHANGE NO CHANGE NO CHANGE NO CHANGE O0 TO O3 = LOW 7.2.
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ComponentRef.book Page 43 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.82 4526 (4-bit Bin Down Counter) The 4526 device is a synchronous programmable 4-bit binary down counter with an active HIGH and an active LOW clock input (CP0, CP1), an asynchronous parallel load input (PL), four parallel inputs (P0 to P3), a cascade feedback input (CF), four buffered parallel outputs (O0 to O3), a terminal count output (TC) and an overriding asynchronous master reset input (MR). 7.2.
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ComponentRef.book Page 44 Thursday, December 7, 2006 10:12 AM CMOS Truth table: INPUTS I0 I1 I2 I3 0 0 0 0 1 1 1 1 0 I4 I5 I6 OUTPUTS I7 I8 I9 0 0 0 0 0 0 any odd number of inputs HIGH any even number of inputs HIGH 1 1 1 1 1 1 1 I10 I11 I12 O 0 0 0 1 1 1 0 1 0 1 = HIGH state (the more positive voltage) = LOW state (the less positive voltage) 7.2.84 4532 (8-bit Priority Enc) This device is an 8-bit priority encoder.
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ComponentRef.book Page 45 Thursday, December 7, 2006 10:12 AM 4000 Series ICs 7.2.85 4539 (Dual 4-input Multiplexer) The 4539 device is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 to I3), an active LOW enable input (E) and a multiplexer output (O). 7.2.86 4543 (BCD-to-seven segment latch/dec/driver) The 4543 device is a BCD to 7-segment latch/decoder/driver for liquid crystal and LED displays.
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ComponentRef.book Page 48 Thursday, December 7, 2006 10:12 AM CMOS Decoder/demultiplexer truth table: INPUTS OUTPUTS E A0 A1 O0 O1 O2 O3 0 0 0 0 1 0 1 0 1 X 0 0 1 1 X 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 X = = = HIGH state (the more positive voltage) LOW state (the less positive voltage) state is immaterial 7.2.89 4556 (Dual 1-of-4 Dec/DEMUX) This device contains two independent 1-of-4 decoders/demultiplexers.
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ComponentRef.book Page 50 Thursday, December 7, 2006 10:12 AM CMOS NAND gate truth table: 7.3.2 A B Y 0 1 0 1 0 0 1 1 1 1 1 0 NC7S02 This device contains a single 2-input NOR gate. Logic function: Y = A+B NOR gate truth table: 7.3.3 A B Y 0 1 0 1 0 0 1 1 1 0 0 0 NC7S04 This device contains a single inverter. Logic function: Y = A INVERTER gate truth table: A Y 1 0 0 1 Multisim Component Reference Guide 7-50 ni.
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ComponentRef.book Page 51 Thursday, December 7, 2006 10:12 AM Tiny Logic 7.3.4 NC7S08 This device contains a single 2-input AND gate. Logic function: Y = AB AND gate truth table: 7.3.5 A B Y 0 1 0 1 0 0 1 1 0 0 0 1 NC7S32 This device contains a single 2-input OR gate.
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ComponentRef.book Page 52 Thursday, December 7, 2006 10:12 AM CMOS 7.3.6 NC7S86 This device contains a single 2-input exclusive-OR gate. Exclusive-OR gate truth table: INPUTS 7.3.7 OUTPUT A B Y 0 0 1 1 0 1 0 1 0 1 1 0 NC7ST00 This device contains a single 2-input NAND gate. Logic function: Y = AB NAND gate truth table: 7.3.8 A B Y 0 1 0 1 0 0 1 1 1 1 1 0 NC7ST02 This device contains a single 2-input NOR gate. Logic function: Y = A+B Multisim Component Reference Guide 7-52 ni.
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ComponentRef.book Page 53 Thursday, December 7, 2006 10:12 AM Tiny Logic NOR gate truth table: 7.3.9 A B Y 0 1 0 1 0 0 1 1 1 0 0 0 NC7ST04 This device contains a single inverter. Logic function: Y = A INVERTER gate truth table: A Y 1 0 0 1 7.3.10 NC7ST08 This device contains a single 2-input AND gate.
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ComponentRef.book Page 54 Thursday, December 7, 2006 10:12 AM CMOS 7.3.11 NC7ST32 This device contains a single 2-input OR gate. Logic function: Y = A+B OR gate truth table: A B Y 0 1 0 1 0 0 1 1 0 1 1 1 7.3.12 NC7ST86 This device contains a single 2-input exclusive-OR gate. Exclusive-OR gate truth table: INPUTS OUTPUT A B Y 0 0 1 1 0 1 0 1 0 1 1 0 7.3.13 NC7SU04 This device contains a single unbuffered inverter. Logic function: Y = A Multisim Component Reference Guide 7-54 ni.
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ComponentRef.book Page 55 Thursday, December 7, 2006 10:12 AM Tiny Logic INVERTER gate truth table: A Y 1 0 0 1 7.3.14 NC7SZ00 This device contains a single UHS (ultra high-speed) 2-input NAND gate. Logic function: Y = AB NAND gate truth table: A B Y 0 1 0 1 0 0 1 1 1 1 1 0 7.3.15 NC7SZ02 This device contains a single UHS (ultra high-speed) 2-input NOR gate.
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ComponentRef.book Page 56 Thursday, December 7, 2006 10:12 AM CMOS 7.3.16 NC7SZ04 This device contains a single UHS (ultra high-speed) inverter. Logic function: Y = A INVERTER gate truth table: A Y 1 0 0 1 7.3.17 NC7SZ05 This device contains a single UHS (ultra high-speed) inverter with open drain output. Logic function: Y = A INVERTER gate truth table: A Y 1 0 0 1 7.3.18 NC7SZ08 This device contains a single UHS (ultra high-speed) 2-input AND gate.
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ComponentRef.book Page 57 Thursday, December 7, 2006 10:12 AM Tiny Logic AND gate truth table: A B Y 0 1 0 1 0 0 1 1 0 0 0 1 7.3.19 NC7SZ125 This device contains a single UHS (ultra high-speed) buffer with 3-state output. BUFFER gate truth table: A Y 0 0 1 1 7.3.20 NC7SZ126 This device contains a single UHS (ultra high-speed) buffer with 3-state output. BUFFER gate truth table: A Y 0 0 1 1 7.3.21 NC7SZ32 This device contains a single UHS (ultra high-speed) 2-input OR gate.
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ComponentRef.book Page 58 Thursday, December 7, 2006 10:12 AM CMOS OR gate truth table: A B Y 0 1 0 1 0 0 1 1 0 1 1 1 7.3.22 NC7SZ38 This device contains a single UHS (ultra high-speed) 2-input NAND gate with open drain output. Logic function: Y = AB NAND gate truth table: A B Y 0 1 0 1 0 0 1 1 1 1 1 0 7.3.23 NC7SZ86 This device contains a single UHS (ultra high-speed) 2-input exclusive-OR gate.
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ComponentRef.book Page 59 Thursday, December 7, 2006 10:12 AM Tiny Logic 7.3.24 NC7SZU04 This device contains a single UHS (ultra high-speed) unbuffered inverter.
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ComponentRef.book Page 60 Thursday, December 7, 2006 10:12 AM CMOS Multisim Component Reference Guide 7-60 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 8 Advanced Peripherals The devices documented in this chapter are not available in all versions of Multisim. 8.1 Keypads These devices are not available in all versions of Multisim. 8.1.1 4X4 Numeric Keypad This device is a 4X4 numeric keypad. While the circuit is simulating, press a key on your keyboard to “press” the same key on this device.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Advanced Peripherals 8.1.2 4x5 Numeric Keypad This device is a 4X5 numeric keypad. While the circuit is simulating, press a key on your keyboard to “press” the same key on this device. You can also hover your cursor over the desired key on the keypad and click to “press” the key. 8.1.3 DTMF Keypad This device is a Dual Tone Multi-Frequency keypad.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM LCDs 8.2 LCDs This feature is not available in all versions of Multisim. 8.2.1 LCD Displays This feature is not available in all versions of Multisim. The LCDS component Family contains a number of LCDs similar to the following: The number of characters available for display changes depending on the LCD selected (e.g., 16x1 in the LCD shown above). The controller for these devices is based on the Hitachi 44780 LCD controller.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM LCDs 8.2.2 Four Digit LCD Display This feature is not available in all versions of Multisim. This device is a four-digit LCD display. 8.2.3 Graphic LCD Display This device emulates the behavior of a graphical LCD and controller. The controller is based on the Toshiba T6963C controller. Note For a demonstration of this part, refer to the Multisim MCU Module chapter of Getting Started with NI Circuit Design Suite.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM LCDs Pin Name No. D0 to D7 12-19 NC 20 I/O Functions I/O Data I / O pins between CPU and T6963C (D7 is MSB) No Connect Basic Commands Command Code D1 D2 Function Hex REGISTERS SETTING 00100001 00100010 00100100 TCX address Data Low address TCY addr.ess 00H High addr.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Virtual Terminal To set the speed for this device: 1. Double-click on the placed virtual terminal and click on the Value tab. 2. Enter the desired speed in the Baud Rate (bps) field. 3. Click OK to close the dialog. Displaying Elements of the Virtual Terminal To show/hide the elements of the virtual terminal: 1. Double-click on the placed virtual terminal to display its properties dialog box and click on the Display tab. 2.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Advanced Peripherals Multisim Component Reference Guide 8-10 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 9 Misc. Digital Components 9.1 TIL Components A number of TIL components are included in Multisim, including: • • • • • • • • • • • • • • • • • 9.1.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Misc. Digital Components AND gate truth table: a b y 0 0 1 1 0 1 0 1 0 0 0 1 Boolean Expression: y = a∗ b y = a& b 9.1.2 OR Gate This component has a high output when at least one input is high. OR gate truth table: a b y 0 0 1 1 0 1 0 1 0 1 1 1 Boolean Expression: y = a+b y=a b Multisim Component Reference Guide 9-2 ni.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM TIL Components 9.1.3 NOT Gate This component inverts, or complements, the input signal. If the input is high, the output is low, and vice versa. NOT gate truth table: a y 0 1 1 0 Boolean Expression: y = a′ y=a 9.1.4 NOR Gate This component is a NOT OR, or an inverted OR gate. Its output is high only when all the inputs are low. Using a NOR gate is the same as having a NOT gate at the output of an OR gate.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Misc. Digital Components Boolean Expression: y = ( a + b) ′ y = a +b 9.1.5 NAND Gate This component is a NOT AND, or inverted AND, gate. Its output is low only when all inputs are high. Using a NAND gate is the same as having a NOT gate at the output of an AND gate. NAND gate truth table: a b y 0 0 1 1 0 1 0 1 1 1 1 0 Boolean Expression: y = ( a∗ b) ′ y = a∗ b 9.1.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM TIL Components XOR gate truth table: a b y 0 0 1 1 0 1 0 1 0 1 1 0 Boolean Expression: y = a ⊕b y = a ′b ′ + ab ′ 9.1.7 XNOR Gate (Exclusive NOR) This component has a high output when an even number of inputs (2, 4, 6, etc.) is high. An odd number of high inputs generates a low output.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Misc. Digital Components 9.1.8 Tristate Buffer This component is a non-inverting buffer with a three-state output. It has a greater fan-out and offers a high-current source and sink capability for driving high-current loads. The buffer has an active-high enable input. If the device is not “enabled”, then the buffer output goes into a high-impedance (Z) state.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM TIL Components Truth table: input output 1 0 1 0 Note When using a buffer, set it up using the Models tab of the Circuit/Component Properties dialog box. Select the LS-BUF or LS-OC-BUF model if the buffer is being used as a TTL device. Select HC-BUF or HC-OD-BUF if the buffer is being used as a CMOS device. Otherwise, by default, the buffer will behave as a regular digital device without any high-current capabilities. 9.1.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Misc. Digital Components 9.1.11 Digital Pulldown A digital pull-down resistor emulates the behavior of an analog resistance value tied to a low voltage level. 9.1.12 Digital Pull-up A digital pull-up resistor emulates the behavior of an analog resistance value tied to a high voltage level. 9.1.13 Digital State Machine The digital state machine’s model can be configured to act as most types of counter or clocked combinational logic blocks.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM TIL Components 9.1.14 BCD_7SEG_DCD This device is a generic BCD to 7 -segment decoder, which is used to convert the output of a BCD counter into a form that will drive a 7-segment display. 9.1.15 Parity Generator/Checker This 9-bit (8 data bits plus 1 parity bit) parity generator/checker features odd/even outputs and control inputs to facilitate operation in either odd- or even-parity applications.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Misc. Digital Components Data selector/multiplexer truth table: STROBE SELECT OUTPUT G A/B A B Y 1 0 0 0 0 X 0 0 1 1 X 0 1 X X X X X 0 1 1 1 0 1 0 9.1.17 Digital Frequency Divider This device is a programmable step-down divider which accepts an arbitrary divisor, a dutycycle term and an initial count value. The generated output is synchronized to the rising edges of the input signal.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM Memory 9.3 Memory A number of EPROM and RAM memory devices are included in Multisim. In addition to the components that contain footprint and model information (for simulation), there are several that include only the footprint, for PCB layout. 9.4 Line Receiver Line receivers are devices which are used in applications such as a bridge between analog signal and digital signals such as RS232 interfaces, or long signal runs over cables.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Misc. Digital Components A number of CPLDs (Complex Programmable Logic Devices) are included that have symbols for layout purposes. These also have footprint, but no model information. 9.8 DSP Devices A number of DSPs (Digital Signal Processors) are included that have symbols for layout purposes. These also have footprint, but no model information. 9.
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM Microcontrollers 9.10 Microcontrollers A number of microcontrollers are included that have symbols for layout purposes. These also have footprint, but no model information. 9.11 Programmable Logic Devices A number of PLDs (Programmable Logic Devices) are included that have symbols for layout purposes. These also have footprint, but no model information. 9.
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM Misc. Digital Components Multisim Component Reference Guide 9-14 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 10 Mixed Components 10.1 ADC DAC An ADC is a special type of encoder that converts the input analog voltage to an equivalent output digital word. 10.1.1 Characteristic Equation The Vin input is the analog voltage input. The voltage at Vref+ and Vref- pins set up the full-scale voltage. The full-scale voltage is given by: Vfs = Vref + − Vref − To start the conversion, the SOC pin should be driven high.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Mixed Components D0 through D7. These are tri-stated outputs pins which may be enabled by pulling the OE pin high. The output at the end of the conversion process is the digital equivalent of the analog input voltage. The discrete value corresponding to the quantized level of input voltage is given by: input voltage * 256 Vfs Note that the output described by this formula is not a continuous function of input voltage.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Timer 10.3 Timer The 555 timer is an IC chip that is commonly used as an astable multivibrator, a monostable multivibrator or a voltage-controlled oscillator. The 555 timer consists basically of two comparators, a resistive voltage divider, a flip-flop and a discharge transistor. It is a two-state device whose output voltage level can be either high or low.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Mixed Components 10.4 Mono Stable This component produces an output pulse of a fixed duration in response to an “edge” trigger at its input. The length of the output pulse is controlled by the timing RC circuit connected to the monostable multivibrator. 10.4.1 Model A monostable multivibrator has two digital inputs: A1 and A2. The multivibrator can be triggered by a positive edge of digital signal at A1 or a negative edge at A2.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM Phase-Locked Loop input reference signal and the VCO output signal. The output of the phase detector is input to the low-pass filter, which removes the high-frequency noise and outputs a DC voltage. The VCO converts the DC voltage into its corresponding frequency signal. 10.5.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Mixed Components 10.5.2 Phase-Locked Loop Parameters and Defaults 10.6 Symbol Parameter name Default Unit Kd Phase detector conversion gain 0.25 V/rad Ko VCO conversion gain 500 kHz/ V fc VCO free-running frequency 250 kHz fp Low-pass filter cut-off frequency 25 kHz Vom VCO output amplitude 1.0 V -- PLL Input Offset 0 V -- PD Input Offset 0 V -- VCO Output Offset 0 V Multivibrators 10.6.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM Multivibrators reason, no external protection resistor is required in series with the timing pin. Input protection from static discharge is provided on all pins. 10.6.2 SN74121N This multivibrator has dual negative-triggered inputs and a single positive-transition-triggered input which can be used as an inhibit input. Complementary output pulses are provided.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Mixed Components 10.6.3 SN74123 This DC triggered multivibrator has output pulse duration control by three methods. The basic pulse time is programmed by selection of external resistance and capacitance values. Enough Schmitt hysteresis is provided to ensure jitter-free triggering from the B input with transition rates as slow as 0.1 mV per nanosecond. 10.6.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 11 Indicators 11.1 Voltmeter The voltmeter offers advantages over the multimeter for measuring voltage in a circuit. You can use an unlimited number of voltmeters in a circuit and rotate their terminals to suit your layout. Resistance (1.0 Ω - 999.99 TW) The voltmeter is preset to a very high resistance (1 MΩ(+)) which generally has no effect on a circuit.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Indicators 11.2 Ammeter The ammeter offers advantages over the multimeter for measuring current in a circuit. You can use an unlimited number of ammeters in a circuit and rotate their terminals to suit your layout. Resistance (1.0 pΩ - 999.99 W) The ammeter’s resistance is preset to 1 mΩ, which presents little resistance to a circuit.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Lamp 11.4 Lamp The lightbulb is an ideal, nonlinear resistive component that dissipates energy in the form of light. It has two rated values, maximum power (Pmax) and maximum voltage (Vmax). Pmax is measured in watts, from mW to kW. Vmax is measured in volts, from mV to kV. A bulb will burn out if the voltage across it exceeds Vmax. At that point, the power dissipated in the bulb exceeds Pmax. 11.4.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Indicators 11.5 Hex Displays 11.5.1 Seven-Segment Display The seven-segment display actively shows its state while the circuit is running. The seven terminals (left to right, respectively) control segments a to g. By giving the proper binary-digit inputs to segments a to g, you can display decimal numbers from 0 to 9 and letters A to F.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM Hex Displays 11.5.2 Decoded Seven-Segment Display This display indicates its current state by displaying hexadecimal digits—numerals 1 to 9 and letters A to F. It is easier to use than the regular seven-segment display because it is already decoded. Each hexadecimal digit is displayed when its 4-bit binary equivalent is received as input, as shown in the truth table below.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Indicators 11.5.3 Alpha-Numeric Display This device is a 15-segment LED alpha-numeric display, which displays text or numeric digits. Both common-anode and common-cathode displays are available. 11.5.4 DCD Hex Display This device is a 7-segment digital hex display. 11.5.5 Plus or Minus 1 LED Display This device is a plus or minus 1 LED display with a decimal point. Multisim Component Reference Guide 11-6 ni.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM Bargraphs 11.5.6 Two Digit 7-Segment Display This is a two-digit seven-segment hex display. Both common-anode and common-cathode displays are available. 11.5.7 Duplexed Seven-Segment Display This device is a duplexed 7-segment display with decimal point. To change “on current”: 1. Double-click on the placed device and click on the Value tab. 2. Change the value in the On Current (Ion) field as desired and click OK to close the dialog. 11.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Indicators Bargraph Display Parameters and Defaults Symbol Parameter Name Default Unit Vf Forward voltage drop 2 V If Forward current at which Vf is measured 0.03 A Ion Forward current 0.01 A 11.6.1 Decoded Bargraph Display This display consists of 10 LEDs arranged side by side, just like the regular bargraph display.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Buzzer/Sonalert Buzzer 11.7 Buzzer/Sonalert Buzzer This component uses the computer’s built-in speaker to simulate an ideal piezoelectric buzzer. A piezoelectric buzzer sounds at a specific frequency when the voltage across its terminals exceeds the set voltage. The buzzer is simulated as a single resistor whose resistance value is dependent on the buzzer’s rated voltage and the current.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Indicators Multisim Component Reference Guide 11-10 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 12 Power 12.1 SMPS Transient Virtual This component family contains a variety of transient switched-mode power supplies (SMPS). To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Power Pin No.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM SMPS Transient Virtual 12.1.2 PWMVM This device is a generic voltage mode PWM controller. In the PWMVM, an error voltage is compared to a sawtooth ramp to control the duty cycle of the power switch. The higher the error voltage, the longer the duty cycle (i.e., the on-time of power switch).
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Power Parameter Description ISOURCE Current source capability POLE First pole in Hertz GAIN DC open-loop gain (default = 90 dB) To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Power 12.1.4 PUSH_CM The PUSH_CM is a generic model for Current Mode Push-Pull PWM controllers. A pushpull converter is an isolated version of buck converter. Due to utilization of the transformer, the output voltage of push-pull can be either higher or lower than the input voltage. Push-pull converters are able to operate at a duty cycle close to 1. Pin No.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM SMPS Transient Virtual Internal error amplifier parameters: Parameter Description VHIGH Maximum output voltage VLOW Minimum output voltage ISINK Current sink capability ISOURCE Current source capability POLE First pole in Hertz GAIN DC open-loop gain (default = 90 dB) To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM SMPS Transient Virtual 12.1.6 HALF_CM The HALF_CM is a generic model for Current Mode Half-Bridge PWM controllers. The half-bridge converter is an isolated version of the buck converter. Due to the dual-switch configuration, it can handle larger power than other single-switch versions. Pin No.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Power Internal error amplifier parameters: Parameter Description VHIGH Maximum output voltage VLOW Minimum output voltage ISINK Current sink capability ISOURCE Current source capability POLE First pole in Hertz GAIN DC open-loop gain (default = 90 dB) To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM SMPS Transient Virtual Pin No.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Power 12.1.8 FULL_VM The FULL_VM is a generic model for Voltage Mode Full-Bridge PWM controllers. The fullbridge converter is derived from the buck converter. By utilizing four operated switches, it is able to deliver a larger amount of power. Pin No.
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM SMPS Transient Virtual Internal error amplifier parameters: Parameter Description VHIGH Maximum output voltage VLOW Minimum output voltage ISINK Current sink capability ISOURCE Current source capability POLE First pole in Hertz GAIN DC open-loop gain (default = 90 dB) To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual 12.2 SMPS Average Virtual This component family contains a variety of averaged switched-mode power supplies (SMPS). To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired.
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ComponentRef.book Page 16 Thursday, December 7, 2006 10:12 AM Power To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired. For more information on the Edit Model dialog box, refer to the Multisim User Guide, or the Multisim helpfile. 12.2.
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ComponentRef.book Page 17 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired. For more information on the Edit Model dialog box, refer to the Multisim User Guide, or the Multisim helpfile. 12.2.
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ComponentRef.book Page 18 Thursday, December 7, 2006 10:12 AM Power To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired. For more information on the Edit Model dialog box, refer to the Multisim User Guide, or the Multisim helpfile. 12.2.
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ComponentRef.book Page 19 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual 12.2.5 BOOSTDCM This is the Ripley's averaged model (no switching component) of a basic boost converter in a current mode controlled configuration. This is an improved model over BOOSTCM, but it must operate in discontinuous conduction mode.
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ComponentRef.book Page 20 Thursday, December 7, 2006 10:12 AM Power 12.2.6 BOOSTVM This is the averaged model (no switching component) of a basic boost converter in a voltage mode controlled configuration.
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ComponentRef.book Page 21 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual 12.2.7 FLYBACKCCM This is the Ripley's averaged model (no switching component) of a flyback converter in a current mode controlled configuration. This is an improved model over FLYBACKCM, but it must operate in continuous conduction mode.
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ComponentRef.book Page 22 Thursday, December 7, 2006 10:12 AM Power 12.2.8 BUCKDCM This is the Ripley's averaged model (no switching component) of a basic buck converter in a current mode controlled configuration. This is an improved model over BUCKCM, but it must operate in discontinuous conduction mode.
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ComponentRef.book Page 23 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual 12.2.9 BUCKVM This is the averaged model (no switching component) of a basic buck converter in a voltage mode controlled configuration. Pin Name Description IN Input voltage OUT Output voltage GND Ground DON Duty cycle setting Parameter Description FS Switching frequency L Main inductor RS Equivalent series resistor of output capacitor To view or change a component’s model parameters: 1.
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ComponentRef.book Page 24 Thursday, December 7, 2006 10:12 AM Power Parameter Description FS Switching frequency L Main inductor RS Equivalent series resistance of output capacitor MC Compensation ramp (in V/s) To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired.
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ComponentRef.book Page 25 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual Parameter Description FS Switching frequency LS Secondary inductance RS Equivalent series resistance of output capacitor MC Compensation ramp (in V/s) RI Current sense resistor VOUT Output voltage VIN Input voltage RL Load resistor N Primary sensing versus secondary coil ratio To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2.
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ComponentRef.book Page 26 Thursday, December 7, 2006 10:12 AM Power Parameter Description FS Switching frequency L Main inductor To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired. For more information on the Edit Model dialog box, refer to the Multisim User Guide, or the Multisim helpfile. 12.2.
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ComponentRef.book Page 27 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual Parameter Description RI Current sense resistor VOUT Output voltage VIN Input voltage RL Load resistor N Primary sensing versus secondary coil ratio To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired.
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ComponentRef.book Page 28 Thursday, December 7, 2006 10:12 AM Power Parameter Description RI Current sense resistor N Primary sensing versus secondary coil transformer ratio To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired.
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ComponentRef.book Page 29 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual Parameter Description VOUT Output voltage VIN Input voltage RL Load resistor N Primary versus secondary transformer ratio To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired.
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ComponentRef.book Page 30 Thursday, December 7, 2006 10:12 AM Power To view or change a component’s model parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. View or edit the model parameters as desired. For more information on the Edit Model dialog box, refer to the Multisim User Guide, or the Multisim helpfile. 12.2.
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ComponentRef.book Page 31 Thursday, December 7, 2006 10:12 AM SMPS Average Virtual 12.2.18SEPICCM This is the averaged model (no switching component) of a SEPIC (single-ended primary inductor converter) in a current mode controlled configuration.
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ComponentRef.book Page 32 Thursday, December 7, 2006 10:12 AM Power 12.2.19ERRAMP This device is a generic single pole op-amp. To edit this device’s parameters: 1. Double-click on the placed component and select the Value tab. 2. Click Edit Model to display the Edit Model dialog box. 3. Edit the Current Instance Parameters as desired. 12.2.20AMPSIMP This device is a generic single pole op-amp. To edit this device’s parameters: 1. Double-click on the placed component and select the Value tab. 2.
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ComponentRef.book Page 33 Thursday, December 7, 2006 10:12 AM Voltage Reference 12.3 Voltage Reference The output voltage of the Zener reference diode is set at approximately 6.9 V and requires a high voltage supply. The band-gap voltage reference diode has a significant advantage over the Zener reference diode in that it is capable of a lower minimum operating current and has a sharper knee.
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ComponentRef.book Page 34 Thursday, December 7, 2006 10:12 AM Power 12.4.1 Input/Output Voltage Differential Rating The input/output voltage differential rating shows the maximum difference between Vin and Vout that can occur without damaging an IC voltage regulator.
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ComponentRef.book Page 35 Thursday, December 7, 2006 10:12 AM Fuse 12.6 Fuse This is a resistive component that protects against power surges and current overloads. A fuse will blow (open) if the current in the circuit goes above Imax, the maximum current rating. Imax can have any value from mA to kA. The fuse is modeled by a resistor, R. 12.6.
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ComponentRef.book Page 36 Thursday, December 7, 2006 10:12 AM Power 12.7 PWM Controllers This family contains footprint information for a number of components. Model data is not provided. 12.8 Miscellaneous Power This family contains footprint information for a number of components. Model data is not provided. 12.9 Power Supply Controller This family contains footprint information for a number of components. Model data is not provided. Multisim Component Reference Guide 12-36 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 13 Misc. Components 13.1 Crystal This component is made of pure quartz and behaves as a quartz crystal resonator, a circular piece of quartz with electrodes plated on both sides mounted inside an evacuated enclosure. When quartz crystals are mechanically vibrated, they produce an AC voltage. Conversely, when an AC voltage is applied across the quartz crystals, they vibrate at the frequency of the applied voltage.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Misc. Components oriented crystallites of varying size. The piezoelectric but not the ferroelectric property of the ceramic materials of the PZT family is made use of in transducer applications, such as ultrasonic echo ranging (sonar), medical diagnostic ultrasound and nondestructive testing system devices. 13.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM DC Motor 13.2.1 Characteristic Equations The characteristic equations of an ideal DC motor are given by: Va = Ra ∗ ia + La Vf = R f ∗ i f + L f J dia + Km ∗ i f ∗ ω m dt di f dt dω m + B f ∗ ω m + TL = Km ∗ i f ∗ ia dt where: ωm = rotational speed Km = EMF constant Va = armature voltage Vf = field voltage Other terms are defined in “DC Motor Parameters and Defaults”.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Misc. Components 13.2.2 DC Motor Parameters and Defaults 13.3 Symbol Parameter Name Default Unit Ra Armature resistance 1.1 Ω La Armature inductance 0.001 H Rf Field resistance 128 Ω Lf Field inductance 0.001 H Bf Shaft friction 0.01 N m*s/rad J Machine rotational inertia 0.01 N*m*s2/rad nn Rated rotational speed 1800 RPM Van Rated armature voltage 115 V Ian Rated armature current 8.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM Vacuum Tube 13.4 Vacuum Tube This component behaves as a three-electrode tube consisting of an anode, cathode and plate electrode. It is often used as an amplifier in audio applications. The vacuum tube is a voltage controlled current device, very similar in operation to an N channel FET.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Misc. Components 13.4.2 Model The dynamic characteristic of the triode vacuum tube is modeled by its DC characteristic with three capacitances (Cgk, Cpk, and Cgp) which are associated interelectrodes. 13.4.3 Triode Vacuum Tube Parameters and Defaults 13.5 Symbol Parameter name Default Unit Vpk Plate-cathode voltage 250 V Vgk Grid-cathode voltage -20 V Ip Plate current 0.
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ComponentRef.book Page 7 Thursday, December 7, 2006 10:12 AM Boost Converter 13.5.1 Characteristic Equations The averaging DC and large-signal characteristics of a Boost converter are given by the following sets of equations: Ii = ILL + ILD = IL I0 = D2 D+ D 2 ( ILL + ILD ) = DD+ D2 2 ∗ IL in which ILL is governed by: ILL = 1 t [ D∗ Vi − D2 (V0 − Vi )]dt L ∫0 where D = duty ratio of the switching device.
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ComponentRef.book Page 8 Thursday, December 7, 2006 10:12 AM Misc. Components 13.5.2 Boost Converter Parameters and Defaults 13.6 Symbol Parameter Name Default Unit L Filter inductance 500 µH R Filter inductor ESR 10 mΩ Fs Switching frequency 50 kHz Buck Converter This component is an averaging circuit model that models the averaging behavior of a stepdown DC-to-DC switching converter. It is based on a unified behavioral model topology.
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ComponentRef.book Page 9 Thursday, December 7, 2006 10:12 AM Buck Converter For the DCM: D2 = D Vi − V 0 V0 Vl = 0 ILD = D(Vi − V 0) D + D2 2∗ L∗ Fs For the critical condition between the CCM and DCM of operation: D2 = 1 − D I LD = I Lcrit = Vi − V0 2∗ L∗ Fs For the CCM: D2 = 1 − D V L = D(Vi − V0 ) − D2 ∗Vo I L = I Lcrit + I LL The averaging behavior governed by the above equations is modeled using the built-in Multisim analog behavioral modeling components.
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ComponentRef.book Page 10 Thursday, December 7, 2006 10:12 AM Misc. Components 13.7 Buck Boost Converter This component is an averaging circuit model that models the averaging behavior of a DC-toDC switching converter. It is based on a unified behavioral model topology. The topology models both small-signal and large-signal characteristics of this converter power stage.
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ComponentRef.book Page 11 Thursday, December 7, 2006 10:12 AM Lossy Transmission Line For the critical condition between the CCM and the DCM of operation: D2 = 1 − D I LD = I Lcrit = D∗Vi 2∗ L∗ Fs For the CCM: D2 = 1 − D V L = D∗Vi − D2 ∗Vo I L = I Lcrit + I LL The averaging behavior governed by these equations is modeled using Multisim’s built-in analog behavioral modeling components. The AC small-signal model is automatically computed. 13.7.2 Buck-Boost Converter Parameters and Defaults 13.
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ComponentRef.book Page 12 Thursday, December 7, 2006 10:12 AM Misc. Components The lossy model also models resistive losses in the line along with the characteristic impedance and propagation delay properties of the transmission line. This is a two-part convolution model for single-conductor lossy transmission lines.
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ComponentRef.book Page 13 Thursday, December 7, 2006 10:12 AM Lossless Line Type 1 13.8.2 Lossy Transmission Line Model Parameters and Defaults Symbol Parameter Name Default Unit Len Length of the transmission line 100 m Rt Resistance per unit length 0.
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ComponentRef.book Page 14 Thursday, December 7, 2006 10:12 AM Misc. Components 13.9.1 Model A lossless transmission line is an LC model.
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ComponentRef.book Page 15 Thursday, December 7, 2006 10:12 AM Net 13.9.3 Lossless Line Type 2 This component is similar to lossless line type 1. 13.10 Net This is a template for building a model. It allows you to input a netlist, using from 2 to 20 pins. 13.11 Filters A number of filters are included that have symbols for layout purposes. These have footprint, but no model information.
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ComponentRef.book Page 16 Thursday, December 7, 2006 10:12 AM Misc. Components 13.12 Miscellaneous Components The MISC family contains footprint information for a number of components, for example, the Integrated GPS Receiver/Synthesizer shown here. Model data is not provided. 13.13 MOSFET Driver This family contains footprint information for a number of components. Model data is not provided. 13.14 Filters This family contains footprint information for a number of components.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 14 RF Components RF components are not available in all editions of Multisim. 14.1 RF Capacitor RF capacitors at RF frequencies show behaviors different from the regular capacitors at low frequencies. RF capacitors at RF frequencies act as a combination of a number of transmission lines, waveguides, discontinuities, and dielectrics. The dielectric layers are usually very thin (typically 0.2 Mµm).
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM RF Components 14.2 RF Inductor From many types of RF inductors, spiral inductors provide higher inductance values and higher Qs. The spiral inductor is a technique of forming a planar inductor in a small place. The shape is described by an increasing radius with angle: i.e.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM RF MOS_3TDN 14.4 RF MOS_3TDN RF FETs have a different type of carrier than bipolar transistors. Only the majority carriers selected for FET should have better transport properties (such as high mobility, velocity, diffusion coefficient). For this reason, RF FETs are fabricated on n-type materials since electrons have better properties. The two most important parameters are the gate length and width.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM RF Components 14.6 Strip Line Stripline is one of the most commonly used transmission lines at microwave frequencies. Stripline is coined for ground-conductor-ground transmission line with a dielectric (normally air) in between. Due to the multiplicity of the circuit functions, substrate, technologies, and frequency bands, there is a wide range of stripline conductors.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Chapter 15 Electromechanical Components 15.1 Sensing Switches Sensing switches are interactive components that can be closed or opened (turned on or off) by pressing a key on the keyboard, or by using the mouse. To specify the key that controls the switch: 1. Double-click on the switch and select its Value tab. 2. Select the key in the Key for Switch drop-down list and click OK.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Electromechanical Components This component family contains a variety of electromechanical switches. These switches are interactive components that can be closed or opened (turned on or off) by pressing a key on the keyboard, or by using the mouse. To specify the key that controls the switch: 1. Double-click on the switch and select its Value tab. 2. Select the key in the Key for Switch drop-down list and click OK.
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ComponentRef.book Page 3 Thursday, December 7, 2006 10:12 AM Coils, Relays Line Transformers are simplified transformers intended for power applications where the primary coils is connected to either 120 or 220 VAC. They will perform step up or step down functions plus several specialized functions of voltage and current measurement. 15.5 Coils, Relays Multisim includes the following coils and relays: • • • • • • 15.
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ComponentRef.book Page 4 Thursday, December 7, 2006 10:12 AM Electromechanical Components 15.7 Protection Devices Multisim includes the following protection devices • • • • • 15.8 fuse overload overload thermal overload magnetic ladder logic overload Output Devices Multisim includes the following output devices: • • • • • • • 15.9 light indicator motor DC motor armature 3 phase motor heater LED indicator solenoid.
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ComponentRef.book Page 5 Thursday, December 7, 2006 10:12 AM Terminals 15.10 Terminals Multisim includes the following terminals: • • • • power terminals control terminals N.O. control terminals N.C. coil terminals.
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ComponentRef.book Page 6 Thursday, December 7, 2006 10:12 AM Electromechanical Components Multisim Component Reference Guide 15-6 ni.
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ComponentRef.book Page 1 Thursday, December 7, 2006 10:12 AM Appendix A A.1 Technical Support and Professional Services Visit the following sections of the National Instruments web site at ni.com for technical support and professional services: Support — online technical support resources at ni.
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ComponentRef.book Page 2 Thursday, December 7, 2006 10:12 AM Multisim Component Reference Guide A-2 ni.
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ComponentRef.book Page iii Thursday, December 7, 2006 10:12 AM AND-OR-INVERTER 6-79 arrays, BJT 4-10 BJT.
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ComponentRef.book Page vi Thursday, December 7, 2006 10:12 AM frequency shift key modulated source 1-7 FSK source.
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ComponentRef.book Page ix Thursday, December 7, 2006 10:12 AM FWDCCM 12-26 FWDDCM 12-28 Hex INVERTER (OC) 74xx05 6-4 (OC) 74xx16 6-23 (Schmitt) 40106 7-5 (Schmitt) 74xx14 6-15 4049 7-23 4069 7-25 74xx04 6-4 Buffer/Driver w/3-state, 74xx366 6-61 Buffer/Driver w/3-state, 74xx368 6-62 Hex INVERTER (OC) 6-5 hysteresis block about 1-35 parameters and defaults 1-36 G GaAsFET about 4-21 equations 4-21 parameters and defaults 4-22 gain.
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ComponentRef.book Page xiii Thursday, December 7, 2006 10:12 AM current-controlled current 1-9 current-controlled voltage 1-9 DC current 1-4 DC voltage 1-2 exp. current 1-21 exp.
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