System information

Video Interface
36 – Reference VSBC-6 Reference Manual
F
LAT
P
ANEL
D
ISPLAY
C
ONNECTOR
See the Connector Location Diagram on page 17 for pin and connector location information.
Table 14: Flat Panel Display Pinout
J12
Pin
Signal
Name Function
Mono
SS
8-bit
Mono
DD
8-bit
Mono
DD
16-bit
Color
TFT
9/12/
16-bit
Color
TFT
18/24
bit
Color
TFT HR
18/24
bit
Color
STN
STN SS
8-bit
(X4bP)
Color
STN SS
16-bit
(4bP)
Color
STN DD
8-bit
(4bP)
Color
STN DD
16-bit
(4bP)
Color
STN DD
24-bit
1 +12V Power Supply
2 +12V Power Supply
3 GND Ground
4 GND Ground
5 +5V Power Supply
6 +5V Power Supply
7 ENAVEE Power sequencing control
for LCD bias voltage
8 GND Ground
9 P0 Data Output UD3 UD7 B0 B0 B00 R1 R1 UR1 UR0 UR0
10 P1 " " UD2 UD6 B1 B1 B01 B1 G1 UG1 UG0 UG0
11 P2 " " UD1 UD5 B2 B2 B02 G2 B1 UB1 UB0 UB0
12 P3 " " UD0 UD4 B3 B3 B03 R3 R2 UR2 UR1 LR0
13 P4 " " LD3 UD3 B4 B4 B10 B3 G2 LR1 LR0 LG0
14 P5 " " LD2 UD2 G0 B5 B11 G4 B2 LG1 LG0 LB0
15 P6 " " LD1 UD1 G1 B6 B12 R5 R3 LB1 LB0 UR1
16 P7 " " LD0 UD0 G2 B7 B13 B5 G3 LR2 LR1 UG1
17 P8 " " P0 LD7 G3 G0 G00 SHF
CLKU
B3 UG1 UB1
18 P9 " " P1 LD6 G4 G1 G01 R4 UB1 LR1
19 P10 " " P2 LD5 G5 G2 G02 G4 UR2 LG1
20 P11 " " P3 LD4 R0 G3 G03 B4 UG2 LB1
21 P12 " " P4 LD3 R1 G4 G10 R5 LG1 UR2
22 P13 " " P5 LD2 R2 G5 G11 G5 LB1 UG2
23 P14 " " P6 LD1 R3 G6 G12 B5 LR2 UB2
24 P15 " " P7 LD0 R4 G7 G13 R6 LG2 LR2
25 P16 " " R0 R00 LG2
26 P17 " " R1 R01 LB2
27 P18 " " R2 R02 UR3
28 P19 " " R3 R03 UG3
29 P20 " " R4 R10 UB3
30 P21 " " R5 R11 LR3
31 P22 " " R6 R12 LG3
32 P23 " " R7 R13 LB3
33 GND Ground
34 GND Ground
35 SHFCLK Shift Clock.
Pixel clock for flat panel data.
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
SHF
CLK
36 FLM First Line Marker.
Flat panel equivalent of VSYNC.
37 DE Display Enable or
M signal (ADCCLK) or BLANK#
38 LP Latch Pulse.
Flat panel equivalent of HSYNC.
39 GND Ground
40 ENABKL Enable Backlight. Can be
programmed for other functions.
41 N/C No Connection
42 N/C " "
43 N/C " "
44 N/C " "