System information

System RAM
VSBC-6 Reference Manual Reference27
System RAM
C
OMPATIBLE
M
EMORY
M
ODULES
The VSBC-6 will accept one 168-pin DIMM memory module with the following characteristics:
Size 8 to 256 MB
Voltage 3.3 Volt
Error Detection Parity or Non-Parity
Error Correction ECC or Non-ECC
Type EDO, 60 ns (all VSBC-6 revisions)
EDO, 60 ns or SDRAM, PC-66 or PC-100 (VSBC-6 rev 4.00 or later)
Note: Parity and ECC features are not supported in the BIOS.
CMOS RAM
C
LEARING
CMOS RAM
Jumper V4[2-3] is normally inserted to provide battery power to the CMOS RAM circuits. The
jumper can be briefly moved to position V4[1-2] to erase the contents of the CMOS RAM should
it become necessary to do so. Do not operate the board with the jumper in the erase position.
Note! The jumper should remain in position V4[1-2] for a full minute to properly erase
the CMOS RAM contents.
Real Time Clock
The VSBC features a year 2000 compliant, battery-backed 146818 compatible real time
clock/calendar chip. Under normal battery conditions, the clock will maintain accurate
timekeeping functions during periods when the board is powered off.
S
ETTING THE
C
LOCK
The CMOS Setup utility (accessed by pressing the [DEL] key during a system boot) can be used
to set the time/date of the real time clock.
Disk on Chip
Socket U22 will accept an M-Systems DiskOnChip (DOC) Flash Disk for non-volatile,
read/write data storage. The DOC can be configured as a boot device
E
NABLE
/ D
ISABLE
The DOC can be enabled or disabled through CMOS Setup by going into the Custom screen and
setting "64 K memory page at E000 "DOC" or "Disabled". When enabled, the DOC appears in
the upper memory region as an 64 K page frame from E0000h to EFFFFh.