Data Sheet
AC6921A Datasheet
8
Confidential
The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without
prior written permission of JIELI.
UART2RXA:Uart2 Data In(A);
SEG4:LCD SEG Output4;
Touch11:Touch Input Channel 11;
33 PA3 I/O
24
GPIO
AMUX1L:Simulator Channel1 Left;
ADC0:ADC Input Channel 0;
UART2TXA:Uart2 Data Out(A);
SEG3:LCD SEG Output3;
Touch10:Touch Input Channel 10;
34 PA2 I/O
24
GPIO
PLNK_DAT1:PLNK Data1;
CLKOUT1:
CAP3:Timer3 Capture;
UART1RXC:Uart1 Data In(C);
SEG2:LCD SEG Output2;
Touch9:Touch Input Channel 9;
35 PA1 I/O
24
GPIO
PLNK_SCLK:PLNK Serial Clock;
PWM0:Timer0 PWM Output;
UART1TXC:Uart1 Data Out(C);
SEG1:LCD SEG Output1;
Touch8:Touch Input Channel 8;
36 DACR O /
DAC Right
Channel
37 DACL O /
DAC Left
Channel
38 DACVDD P / DAC Power
39 VCOM P / DAC Reference
40 DACVSS P / Ground
41 PA0 I/O
24
GPIO
PLNK_DAT0:PLNK Data0;
MIC:MIC Input Channel;
UART0RXB:Uart0 Data In(B);
SEG0:LCD SEG Output0;
42 VDDIO P / IO Power 3.3v
43 PB5 I/O
8
GPIO
UART0TXB:Uart0 Data Out(B);
AMUX0R:Simulator Channel0 Right;
SPI1DOA:SPI1 Data Out(A);
SD1DAT3B:SD1 Data3(A);
ALNK_DAT3B:Audio Link Data3(B);
SD0CLKB:SD0 Clock(B);
ADC9:ADC Input Channel 9;
Touch5:Touch Input Channel 5;
44 PB4 I/O
8
GPIO
PWM3:Timer3 PWM Output;
AMUX0L:Simulator Channel0 Left;
SPI1CLKA:SPI1 Clock(A);