Specifications

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Generating Zilog Z80 style mnemonics from Intel 8080 code is possible because the
8080 has an instruction set that is a compatible binary subset of those of the Z80.
Simply specify the CPU type is as Z80 and
DASMx
will correctly disassemble 8080
code into Zilog mnemonics. This will not suit Intel assembler die-hards, but may
be preferred by those more familiar with the Z80.
WARNING: if
DASMx
is used as a Z80 disassembler on 8085 code and either of
the two 8085 specific instructions are used (rim and sim) then problems will
result. In such cases Zilog disassembly is probably best avoided. If you really
must have Zilog mnemonics then read the following description of how these
instructions are handled and be prepared for code threading to work incorrectly.
rim is a one byte instruction, but
DASMx
will attempt to disassemble this as the
two byte jr nz Z80 instruction. This will both generate a false label and ignore
the next byte in the 8085 opcode stream. Since that could be the first byte in a
multi-byte opcode it could take a number of erroneously disassembled instructions
before synchronisation is achieved.
sim is a one byte instruction that will be disassembled as the first byte of the three
byte ld hl immediate instruction. The results will be similar to those for rim.
Intel MCS-48™ family (8048 etc.)
DASMx
will disassemble opcodes for the following Intel MCS-48™ family devices
(and equivalents from second source manufacturers): 8021, 8022, 8035, 8039, 8041,
8741, 8048, 8049 and 8748. The CPU type should be set to 8048 and the term
"8048" is used throughout this documentation to refer to this family of devices.
The 8021 instruction set is a much reduced subset of the full 8048 set of
instructions.
The 8022 has a very similar instruction set to the 8021, but with slightly more of the
8048 instructions and a few new instructions to handle the on-chip analogue to
digital converter.
The 8041/8741 has almost the same instruction set as the 8048, but with just a few
instructions missing.
DASMx
can disassemble code for the 8021, 8022, 8041 and 8741 variants with the
caveat that data areas may be disassembled as 8048 instructions that are in fact
illegal on the variant.
The 8048 jump and call instructions operate on an 11-bit address (i.e. within a
2 Kbyte memory bank). A memory bank select bit (controlled by the sel mb0 and
sel mb1 instructions) is combined with the 11-bit jump/call address to give full
12-bit addressing within the 4 Kbyte address space of the 8048. This presents a
problem for the code threading and automatic label generation functions of
DASMx
since a destination address can only be fully calculated if the last memory
bank select operation is known. Tracking the state of the memory bank select bit is