Specifications

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MOS Technology/Rockwell 6502
The MOS Technology/Rockwell 6502 has a similar instruction set to that of the
6800 (but totally opcode incompatible).
A number of 6502 variants, with expanded instruction sets and addressing
capabilities have appeared over the years.
DASMx
copes with some, but not all, of
these variants (see next sections). If you know that a processor is based on the 6502
architecture, but are unsure of the variant then try disassembling with the CPU
type set to 6502, 65C02 and 65C00. Inspect the results and select whichever gives
the most intelligent disassembly. [Tip: try this with code threading and select the
processor that gives least threading errors.]
Rockwell 65C00/21 and 65C29
The Rockwell 65C00/21 and 65C29 each contain two enhanced CMOS 6502 CPU
cores plus on-chip masked ROM, RAM, two timers and general purpose I/O.
Instruction set differences over the basic NMOS 6502 include new instructions for
unsigned multiply, memory bit set and reset, branch on bit set/reset,
unconditional branch and push/pop for the index registers. With the exception of
the multiply instruction, these new instructions are a subset of the additional
instructions in the 65C02.
Note that the CPU type for the 65C00/21 should be specified as 65C00 (i.e.
without the trailing "/21").
Rockwell 65C02, 65C102 and 65C112
The Rockwell 65C02 is an improved version of, and object code compatible with,
the original NMOS 6502 with twelve new basic instructions (giving 59 new
opcodes with variants). The 65C02 is pin compatible with the original 6502. The
65C102 is similar, but with minor pinout differences to provide for multi-processor
bus operation. The 65C112 has no internal clock oscillator and is designed as a
slave processor to the 65C102. The extra instructions include all of the additions
found in the 65C00/21 and 65C29 dual processors – with the exception of the
multiply instruction found in those devices.
Zilog Z80
The Zilog Z80 (also made by Mostek, Sharp, NEC and other second sources) has an
instruction set that is binary compatible with that of the Intel 8080, but with many
additional instructions. Although each 8080 instruction has an identical Z80
instruction, Zilog chose to use a different mnemonic style for almost every
instruction. Consequently, Z80 assembler (even if restricted to the 8080 subset)
appears quite different even though the resulting binary image is identical.