User`s guide

System Clocking LZ87010 Advance User’s Guide
2-4 1/15/03
2.1.2 Power-Saving Modes
During periods when full operation is not required, significant power savings can be
achieved by deactivating portions of the LZ87010 using the PCON register.
2.1.2.1 Idle Mode
When PCON.IDL is set to ‘1’ by software, the microcontroller enters Idle Mode. In this
mode, the processor core is halted (by stopping CCLK), but the peripherals (including the
timers) continue to operate. The mode can be exited via an enabled interrupt (generated
from either an internal or an external source). The interrupt causes the PCON.IDL bit to be
reset to ‘0’.
Alternatively, Idle mode can be exited by asserting Reset.
Idle Mode is used in applications where continuous processing is not required, an example
application being a keyboard controller. In this application, the core would be put into the
Idle mode with a timer interrupt enabled and the timer running with an appropriate period
(for instance,15 ms). Each timer interrupt would cause the CPU to exit Idle Mode and exe-
cute a keyboard scanning routine to detect keypresses. At the end of the scanning routine,
the CPU would be placed back in Idle mode.
The Watchdog Timer should be halted before the system is placed into Idle Mode, to pre-
clude unwanted resets.
2.1.2.2 Stop Mode
Stop Mode is entered by setting PCON.PD to ‘1’. In this mode, the entire microcontroller
is stopped. The oscillators are halted, and no clocking occurs within the device. Stop Mode
can only be exited by asserting a Reset.
The external Reset that restarts the clocks after a Stop must allow for the recovery time of
the high-frequency crystal oscillator, which is typically on the order of a few milliseconds.
In addition to explicit power-saving modes, it is possible to save power by reducing the
clock frequency by choosing a large clock divisor in the CLKCFG.CLKDIV field, or by
clocking the system with the subclock instead of the main clock.