User`s guide

LZ87010 Advance User’s Guide Analog Outputs (DAC)
1/15/03 14-5
14.3.2 WGCTL0 and WGCTL1 (Control) Registers
The WGCTL0 and WGCTL1 (Waveform Generator Control) registers select the clock
source for the waveform generator, determine whether processor writes go to the wave-
form generator or directly to the DAC, and start or stop the waveform generator.
Table 14-4. WGCTL0 and WGCTL1 Registers
BIT 7 6 5 4 3 2 1 0
FIELD /// /// /// CLK[2] CLK[1] CLK[0] START WEN
RESET 00000000
RW RW RW RW RW RW RW RW RW
ADDR
WGCTL0: 0xCA
WGCTL1: 0xCB
Table 14-5. WGCTL0 and WGCTL1 Register Bits
BIT NAME DESCRIPTION
7:5 /// Reserved Reads ‘0’. Write as ‘0’.
4:2 CLK[2:0]
Clock Select Sets the source of the Waveform Generator Clock. See
Table 14-6.
1START
Start/Stop Enables or disables clocking of the Waveform Generator. The DAC
is still active when the Waveform Generator is stopped.
0 = Stop Waveform Generator
1 = Start Waveform Generator
When START is set, reads and writes to RAM are ignored. Waveform RAM can
only be accessed by software when the waveform generator is stopped.
0WEN
Write Enable
0 = Disable writes to RAM. Writes go directly to the DAC.
1 = Enables writes to RAM. Disables direct DAC writes.
Table 14-6. Waveform Generator Clock Input Select
CLK[2:0] CLOCK INPUT
000 WFGIN0 pin
001 WFGIN1 pin
010 TM2CMP0 (output of Timer 2 Compare 0 unit)
011 TM3CMP1 (output of Timer 3 Compare 1 unit)
100 TM4CMP0 (output of Timer 4 Compare 0 unit)
101 TM5CMP1 (output of Timer 5 Compare 1 unit)
110 Reserved
111 Reserved