Service manual

FO-DC600U
Pin name Pin No. Pin Description
VBB 1, 14 Output stage power-supply voltage
SENSE1 2 Set current detection pins.
SENSE2 13 Connect these pins, fed back through noise filters, to E1, and E2.
E1 3 Current control pins by connecting between this pin and GND.
E2 12
DGND 4,11 Internal diode anode connection
OUT1B 6
OUT1A 7 Output pins
OUT2B 8
OUT2A 9
GND 15 Ground
RC1 27 Used to set the output off time for the switched output signals.
RC2 16 The fixed off times are set by the capacitors and resistors connected to these pins. t off CR
Vref1 26 Output current settings
Vref2 17 The output current is determined by the voltage (in the range 1.5 to 7.5V) input to these pins.
PHASE1 25 Output phase switching inputs.
PHASE2 18 [H] input : OUT A = high, OUT B = low
[L] input : OUT A = low, OUT B = high
ENABLE1 24 Output on/off settings
ENABLE2 19 [H] input : output OFF
[L] input : output ON
I01, I11 22, 23 Digital inputs that set the output current
I02, I12 21, 20 The output currents can be set to 1/3, 2/3, or full by setting these pins to appropriate combinations of high and low levels.
VCC 28 Logic block power supply.
LB1845 (IC3) Terminal description
[3] Circuit description of CIS unit
1. CIS
CIS is an image sensor which puts the original paper in close contact
with the full-size sensor for scanning, being a monochromatic type
with the pixel number of 2,048 dots and the main scanning density of
8 dots/mm.
It is composed of sensor, rod lens, LED light source, control circuit
and so on, and the reading line and focus are previously adjusted as
the unit.
Due to the full-size sensor, the focus distance is so short that the set
is changed from the light weight type to the compact type.
2. Waveforms
The following clock is supplied from LC272D0BT-WA6 via 74HCT244
on the control board, and AO is output.
Fig. 7
1.2 ms
0V
1.5 V (TYP)
(White original paper)
Approx. 5 V
CISSI
CISCLK
AO
1.84 MHz
Approx. 5 V
0 V
(8) LCD control block
This block consists of the LCD controller and drive voltage generation
circuit.
1) SED1374F0A (IC10): pin-80, QFP (LCD Controller)
The LCD controller SED1374F0A (IC10) conducts direct control to dis-
play the bitmap data through the LCD module, which is transferred to
the built-in VRAM by the CPU (IC24).
2) Drive voltage generation circuit
The drive voltage of the LCD module is generated by the booster circuit
including the switching regulator S-8358J50MC (IC4).
The CPU monitors the ambient temperature of the LCD module using
the thermistor, and the temperature adjustment of the LCD’s contrast is
performed by controlling the drive voltage.
(9) Network I/F block
This block establishes interface to the NIC option (FO-LN1) and PCL
board option (FO-NP1) through SUB ASIC mentioned in the above item
5). The I/F line (DPO-bus) to NIC is shared with the Fax system on the
PCL board, and SUB ASIC assigns a place to connect. The PCU (laser
printer engine) is also shared with the Fax system on the PCL board,
and the printer master is decided by mutual negotiations via SUB ASIC.
The I/F route is as follows:
Fax system to NIC
Makes communication via SUB ASIC.
Fax system to PCL board
• Serial Communication: Clock sync serial communication function
• Print Request/Acknowledge: Print request from the PCL board and
response to it
NIC to PCL board
Makes communication via SUB ASIC.
PCL board to PCU
• Serial Communication: Clock sync serial communication function
• Other signals: The print vertical sync signal (/TOD) and the print
horizontal sync signal (/HSYNC) are connected directly. Signals other
than these are connected via SUB ASIC.
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