Specifications

PIN
No.
Pin name Signal name IN/OUT Destination Function
94 /DACK1 N.C NC
95 /DACK0 PARACK_ OUT ASIC(KZ3H008302) ACK_ signal to interface ASIC
96 /CPURST CPURST_ OUT CPU CPU reset signal
97 /CRST COLDRES_ OUT CPU Cold reset signal
98 VCCOK VCCOK OUT CPU, ASIC(KZ3H008302) V
CC
states effective
99 V
CC
3.3V IN Power source
100 GND GND IN GND
101 /NMI NMI_ OUT CPU Non-maskable interruption output
102 /INTR2 INTR2_ OUT CPU Interruption output 2
103 /INTR1 INTR1_ OUT CPU Interruption output 1
104 /INTR0 INTR0_ OUT CPU Interruption output 0
105 /EXREQ EXREQ_ OUT CPU Bus open request
106 /READY READY_ OUT CPU Command reception ready from
CPU
107 /VALIN VALIN_ OUT CPU VALID INPUT(to CPU)
108 /PIARD PIARD_ OUT 74LVC16245, ASIC(KZ3H008302) External peripheral Read Enable
109 V
CC
3.3V IN Power source
110 GND GND IN GND
111 GND GND IN GND
112 GND GND IN GND
113 SCLK SCLK IN PLL IC(CY2292) Serial clock
114 /DREQ3 IN NC (3.3V pull up)
115 /DREQ2 IN NC (3.3V pull up)
116 /DREQ1 IN NC (3.3V pull up)
117 /DREQ0 PARREQ_ IN ASIC(KZ3H008302) DREQ_ signal from interface ASIC
118 /POR RESET_ IN 74LS244 Power on reset
119 /RLS RLS_ IN CPU Bus open recognition
120 /VALOUT VALOUT_ IN CPU VALID OUTPUT(from CPU)
121 /WAIT IN GND
122 /PIAWE PIAWE_ OUT ASIC(KZ3H008302) External peripheral Write Enable
123 /PIACS5 NC
124 /PIACS4 NC
125 /PIACS3 NC
126 /PIACS2 NC
127 V
CC
3.3V IN Power source
128 GND GND IN GND
129 /PIACS1 NC
130 /PIACS0 LDTOE_ , 1284CS_ OUT 74LVC16245, ASIC(KZ3H008302) Interface ASIC chip select
131 /ROMCS3 RCS3_ OUT NC
132 /ROMCS2 RCS2_ NC
133 /ROMCS1 RCS1_ OUT LH28F800SUT Boot ROM chip select
134 /ROMCS0 RCS0_ OUT LH28F016SUT Code ROM chip select
135 /MWE MWE_ OUT 74LVC16244 DRAM write enable
136 /MOE MOE_ OUT 74LVC16244 DRAM output enable
137 V
CC
3.3V IN Power source
138 GND GND IN GND
139 /CAS7 CAS7_ OUT 16M Flash, DIMM168 DRAM CAS_ signal
DM-1505
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